66 lines
1.4 KiB
C++
66 lines
1.4 KiB
C++
/*
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* \brief Cpu class implementation specific to Cortex A15 SMP
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* \author Stefan Kalkowski
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* \date 2015-12-09
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*/
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/*
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* Copyright (C) 2015-2016 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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/* core includes */
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#include <kernel/lock.h>
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#include <kernel/pd.h>
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#include <pic.h>
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#include <board.h>
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/* base-hw includes */
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#include <kernel/perf_counter.h>
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using namespace Kernel;
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/* entrypoint for non-boot CPUs */
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extern "C" void * _start_secondary_cpus;
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/* indicates boot cpu status */
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static volatile bool primary_cpu = true;
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void Kernel::Cpu::init(Kernel::Pic &pic, Kernel::Pd & core_pd, Genode::Board & board)
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{
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/*
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* local interrupt controller interface needs to be initialized that early,
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* because it potentially sets the SGI interrupts to be non-secure before
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* entering the normal world in Genode::Cpu::init()
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*/
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pic.init_cpu_local();
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Genode::Cpu::init();
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Sctlr::init();
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Psr::write(Psr::init_kernel());
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invalidate_inner_data_cache();
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/* primary cpu wakes up all others */
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if (primary_cpu && NR_OF_CPUS > 1) {
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primary_cpu = false;
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board.wake_up_all_cpus(&_start_secondary_cpus);
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}
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enable_mmu_and_caches(core_pd);
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{
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Lock::Guard guard(data_lock());
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/* enable performance counter */
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perf_counter()->enable();
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/* enable timer interrupt */
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pic.unmask(Timer::interrupt_id(id()), id());
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}
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}
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