355 lines
7.7 KiB
C++
355 lines
7.7 KiB
C++
/*
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* \brief CPU driver for core
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* \author Martin stein
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* \author Stefan Kalkowski
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* \date 2011-11-03
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*/
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/*
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* Copyright (C) 2011-2016 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#ifndef _SPEC__CORTEX_A9__CPU_SUPPORT_H_
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#define _SPEC__CORTEX_A9__CPU_SUPPORT_H_
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/* core includes */
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#include <spec/arm_v7/cpu_support.h>
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#include <board.h>
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namespace Genode
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{
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/**
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* Part of CPU state that is not switched on every mode transition
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*/
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class Cpu_lazy_state;
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/**
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* CPU driver for core
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*/
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class Cortex_a9;
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}
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namespace Kernel { using Genode::Cpu_lazy_state; }
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class Genode::Cpu_lazy_state
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{
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friend class Cortex_a9;
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private:
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/* advanced FP/SIMD - system registers */
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uint32_t fpscr;
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uint32_t fpexc;
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/* advanced FP/SIMD - general purpose registers d0-d15 */
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uint64_t d0, d1, d2, d3, d4, d5, d6, d7;
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uint64_t d8, d9, d10, d11, d12, d13, d14, d15;
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public:
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/**
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* Constructor
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*/
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inline Cpu_lazy_state();
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};
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class Genode::Cortex_a9 : public Arm_v7
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{
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friend class Cpu_lazy_state;
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private:
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/**
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* Coprocessor Access Control Register
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*/
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struct Cpacr : Register<32>
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{
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struct Cp10 : Bitfield<20, 2> { };
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struct Cp11 : Bitfield<22, 2> { };
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/**
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* Read register value
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*/
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static access_t read()
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{
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access_t v;
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asm volatile ("mrc p15, 0, %[v], c1, c0, 2" : [v]"=r"(v) ::);
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return v;
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}
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/**
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* Override register value
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*
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* \param v write value
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*/
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static void write(access_t const v)
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{
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asm volatile ("mcr p15, 0, %[v], c1, c0, 2" :: [v]"r"(v) :);
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}
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};
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/**
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* Floating-point Status and Control Register
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*/
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struct Fpscr : Register<32>
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{
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/**
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* Read register value
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*/
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static access_t read()
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{
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/* FIXME: See annotation 1. */
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access_t v;
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asm volatile ("mrc p10, 7, %[v], cr1, cr0, 0" : [v] "=r" (v) ::);
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return v;
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}
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/**
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* Override register value
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*
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* \param v write value
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*/
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static void write(access_t const v)
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{
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/* FIXME: See annotation 1. */
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asm volatile ("mcr p10, 7, %[v], cr1, cr0, 0" :: [v] "r" (v) :);
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}
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};
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/**
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* Floating-Point Exception Control register
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*/
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struct Fpexc : Register<32>
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{
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struct En : Bitfield<30, 1> { };
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/**
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* Read register value
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*/
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static access_t read()
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{
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/* FIXME: See annotation 1. */
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access_t v;
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asm volatile ("mrc p10, 7, %[v], cr8, cr0, 0" : [v] "=r" (v) ::);
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return v;
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}
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/**
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* Override register value
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*
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* \param v write value
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*/
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static void write(access_t const v)
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{
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/* FIXME: See annotation 1. */
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asm volatile ("mcr p10, 7, %[v], cr8, cr0, 0" :: [v] "r" (v) :);
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}
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};
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Cpu_lazy_state * _advanced_fp_simd_state;
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/**
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* Enable or disable the advanced FP/SIMD extension
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*
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* \param enabled wether to enable or to disable advanced FP/SIMD
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*/
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static void _toggle_advanced_fp_simd(bool const enabled)
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{
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Fpexc::access_t fpexc = Fpexc::read();
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Fpexc::En::set(fpexc, enabled);
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Fpexc::write(fpexc);
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}
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/**
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* Save state of the advanced FP/SIMD extension into 'state'
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*/
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static void _save_advanced_fp_simd_state(Cpu_lazy_state * const state)
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{
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/* save system registers */
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state->fpexc = Fpexc::read();
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state->fpscr = Fpscr::read();
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/*
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* Save D0 - D15
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*
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* FIXME: See annotation 2.
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*/
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void * const d0_d15_base = &state->d0;
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asm volatile (
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"stc p11, cr0, [%[d0_d15_base]], #128"
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:: [d0_d15_base] "r" (d0_d15_base) : );
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}
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/**
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* Load state of the advanced FP/SIMD extension from 'state'
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*/
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static void _load_advanced_fp_simd_state(Cpu_lazy_state * const state)
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{
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/* load system registers */
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Fpexc::write(state->fpexc);
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Fpscr::write(state->fpscr);
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/*
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* Load D0 - D15
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*
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* FIXME: See annotation 2.
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*/
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void * const d0_d15_base = &state->d0;
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asm volatile (
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"ldc p11, cr0, [%[d0_d15_base]], #128"
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:: [d0_d15_base] "r" (d0_d15_base) : );
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}
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/**
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* Return wether the advanced FP/SIMD extension is enabled
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*/
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static bool _advanced_fp_simd_enabled()
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{
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Fpexc::access_t fpexc = Fpexc::read();
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return Fpexc::En::get(fpexc);
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}
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public:
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/**
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* Auxiliary Control Register
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*/
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struct Actlr : Register<32>
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{
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struct Smp : Bitfield<6, 1> { };
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static access_t read()
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{
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access_t v;
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asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (v) :: );
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return v;
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}
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static void write(access_t const v) {
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asm volatile ("mcr p15, 0, %0, c1, c0, 1" :: "r" (v) : ); }
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static void enable_smp()
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{
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access_t v = read();
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Smp::set(v, 1);
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write(v);
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}
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};
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/**
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* Constructor
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*/
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Cortex_a9() : _advanced_fp_simd_state(0) { }
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/**
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* Initialize advanced FP/SIMD extension
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*/
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static void init_advanced_fp_simd()
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{
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Cpacr::access_t cpacr = Cpacr::read();
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Cpacr::Cp10::set(cpacr, 3);
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Cpacr::Cp11::set(cpacr, 3);
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Cpacr::write(cpacr);
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_toggle_advanced_fp_simd(false);
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}
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/**
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* Prepare for the proceeding of a user
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*
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* \param old_state CPU state of the last user
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* \param new_state CPU state of the next user
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*/
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static void prepare_proceeding(Cpu_lazy_state * const old_state,
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Cpu_lazy_state * const new_state)
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{
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if (old_state == new_state) { return; }
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_toggle_advanced_fp_simd(false);
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}
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/**
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* Return wether to retry an undefined user instruction after this call
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*
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* \param state CPU state of the user
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*/
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bool retry_undefined_instr(Cpu_lazy_state * const state)
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{
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if (_advanced_fp_simd_enabled()) { return false; }
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_toggle_advanced_fp_simd(true);
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if (_advanced_fp_simd_state != state) {
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if (_advanced_fp_simd_state) {
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_save_advanced_fp_simd_state(_advanced_fp_simd_state);
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}
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_load_advanced_fp_simd_state(state);
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_advanced_fp_simd_state = state;
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}
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return true;
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}
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/**
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* Write back dirty cache lines and invalidate whole data cache
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*/
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void clean_invalidate_data_cache()
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{
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clean_invalidate_inner_data_cache();
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Kernel::board().l2_cache().clean_invalidate();
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}
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/**
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* Invalidate whole data cache
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*/
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void invalidate_data_cache()
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{
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invalidate_inner_data_cache();
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Kernel::board().l2_cache().invalidate();
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}
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/**
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* Clean and invalidate data-cache for virtual region
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* 'base' - 'base + size'
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*/
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void clean_invalidate_data_cache_by_virt_region(addr_t base,
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size_t const size)
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{
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Arm::clean_invalidate_data_cache_by_virt_region(base, size);
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Kernel::board().l2_cache().clean_invalidate();
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}
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void translation_table_insertions() { invalidate_branch_predicts(); }
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static unsigned executing_id() { return Mpidr::Aff_0::get(Mpidr::read()); }
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/*************
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** Dummies **
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*************/
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static void translation_added(addr_t, size_t) { }
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};
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Genode::Cpu_lazy_state::Cpu_lazy_state() { fpexc = Cortex_a9::Fpexc::En::bits(1); }
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/*
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* Annotation 1
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*
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* According to the ARMv7 manual this should be done via vmsr/vmrs instruction
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* but it seems that binutils 2.22 doesn't fully support this yet. Hence, we
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* use a co-processor instruction instead. The parameters to target the
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* register this way can be determined via 'sys/arm/include/vfp.h' and
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* 'sys/arm/arm/vfp.c' of the FreeBSD head branch as from 2014.04.17.
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*/
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/*
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* Annotation 2
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*
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* According to the ARMv7 manual this should be done via vldm/vstm instruction
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* but it seems that binutils 2.22 doesn't fully support this yet. Hence, we
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* use a co-processor instruction instead. The parameters to target the
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* register this way can be determined via 'sys/arm/arm/vfp.c' of the FreeBSD
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* head branch as from 2014.04.17.
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*/
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#endif /* _SPEC__CORTEX_A9__CPU_SUPPORT_H_ */
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