a40932a324
* name irq controller memory mapped I/O regions consistently in board descriptions * move irq controller and timer memory mapped I/O region descriptions from cpu class to board class * eliminate artificial distinction between flavors of ARM's GIC * factor cpu local initialization out of ARM's GIC interface description, which is needed if the GIC is initialized differently e.g. for TrustZone Ref #1405
42 lines
900 B
C++
42 lines
900 B
C++
/*
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* \brief Board driver definitions common to Cortex A15 SoCs
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* \author Stefan Kalkowski
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* \date 2015-02-09
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*/
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/*
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* Copyright (C) 2015 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#ifndef _SPEC__CORTEX_A15__BOARD_SUPPORT_H_
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#define _SPEC__CORTEX_A15__BOARD_SUPPORT_H_
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/* core includes */
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#include <drivers/board_base.h>
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namespace Cortex_a15
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{
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class Board_base : public Genode::Board_base
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{
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private:
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using Base = Genode::Board_base;
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public:
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enum
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{
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/* interrupt controller */
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IRQ_CONTROLLER_DISTR_BASE = Base::IRQ_CONTROLLER_BASE + 0x1000,
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IRQ_CONTROLLER_DISTR_SIZE = 0x1000,
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IRQ_CONTROLLER_CPU_BASE = Base::IRQ_CONTROLLER_BASE + 0x2000,
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IRQ_CONTROLLER_CPU_SIZE = 0x2000,
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};
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};
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}
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#endif /* _SPEC__CORTEX_A15__BOARD_SUPPORT_H_ */
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