87 lines
2.2 KiB
ArmAsm
87 lines
2.2 KiB
ArmAsm
/*
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* \brief Macros that are used by multiple assembly files
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* \author Martin Stein
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* \date 2014-01-13
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*/
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/*
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* Copyright (C) 2014 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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/* core includes */
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.include "spec/arm/macros_support.s"
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/**
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* Load kernel name of the executing CPU into register 'r'
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*/
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.macro _get_cpu_id r
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/* read the multiprocessor affinity register */
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mrc p15, 0, \r, c0, c0, 5
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/* get the affinity-0 bitfield from the read register value */
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and \r, \r, #0xff
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.endm
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/**
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* Determine the base of the client context of the executing CPU
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*
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* \param target_reg register that shall receive the base pointer
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* \param buf_reg register that can be polluted by the macro
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* \param client_context_ptr label of the client context pointer base
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*/
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.macro _get_client_context_ptr target_reg, buf_reg, client_context_ptr
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/* get kernel name of CPU */
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_get_cpu_id \buf_reg
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/* multiply CPU name with pointer size to get offset of pointer */
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mov \target_reg, #CONTEXT_PTR_SIZE
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mul \buf_reg, \buf_reg, \target_reg
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/* get base of the pointer array */
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adr \target_reg, \client_context_ptr
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/* add offset and base to get CPU-local pointer */
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add \target_reg, \target_reg, \buf_reg
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ldr \target_reg, [\target_reg]
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.endm
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/**
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* Save sp, lr and spsr register banks of specified exception mode
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*/
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.macro _save_bank mode
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cps #\mode /* switch to given mode */
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mrs r1, spsr /* store mode-specific spsr */
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stmia r0!, {r1,sp,lr} /* store mode-specific sp and lr */
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.endm /* _save_bank mode */
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/**
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* Restore sp, lr and spsr register banks of specified exception mode
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*/
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.macro _restore_bank mode
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cps #\mode /* switch to given mode */
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ldmia r0!, {r1,sp,lr} /* load mode-specific sp, lr, and spsr into r1 */
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msr spsr_cxfs, r1 /* load mode-specific spsr */
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.endm
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/***************
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** Constants **
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***************/
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/* hardware names of CPU modes */
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.set USR_MODE, 16
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.set FIQ_MODE, 17
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.set IRQ_MODE, 18
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.set SVC_MODE, 19
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.set ABT_MODE, 23
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.set UND_MODE, 27
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