114 lines
2.5 KiB
C++
114 lines
2.5 KiB
C++
/*
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* \brief Specific core implementations
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* \author Stefan Kalkowski
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* \date 2012-10-24
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*/
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/*
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* Copyright (C) 2012-2013 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#include <drivers/trustzone.h>
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/* core includes */
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#include <platform.h>
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#include <board.h>
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#include <pic.h>
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#include <cpu.h>
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#include <kernel/irq.h>
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using namespace Genode;
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namespace Kernel { void init_platform(); }
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/**
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* Interrupts that core shall provide to users
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*/
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static unsigned irq_ids[] =
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{
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Board::EPIT_2_IRQ,
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Board::GPIO1_IRQL,
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Board::GPIO1_IRQH,
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Board::GPIO2_IRQL,
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Board::GPIO2_IRQH,
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Board::GPIO3_IRQL,
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Board::GPIO3_IRQH,
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Board::GPIO4_IRQL,
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Board::GPIO4_IRQH,
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Board::GPIO5_IRQL,
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Board::GPIO5_IRQH,
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Board::GPIO6_IRQL,
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Board::GPIO6_IRQH,
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Board::GPIO7_IRQL,
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Board::GPIO7_IRQH,
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Board::I2C_2_IRQ,
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Board::I2C_3_IRQ
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};
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enum { IRQ_IDS_SIZE = sizeof(irq_ids)/sizeof(irq_ids[0]) };
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void Kernel::init_platform()
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{
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/* make user IRQs become known by cores IRQ session backend and kernel */
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static uint8_t _irqs[IRQ_IDS_SIZE][sizeof(Irq)];
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for (unsigned i = 0; i < IRQ_IDS_SIZE; i++) {
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new (_irqs[i]) Irq(irq_ids[i]);
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}
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}
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unsigned * Platform::_irq(unsigned const i)
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{
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return i < IRQ_IDS_SIZE ? &irq_ids[i] : 0;
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}
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Native_region * Platform::_ram_regions(unsigned const i)
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{
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static Native_region _regions[] =
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{
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{ Trustzone::SECURE_RAM_BASE, Trustzone::SECURE_RAM_SIZE },
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};
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return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
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}
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Native_region * Platform::_mmio_regions(unsigned const i)
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{
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static Native_region _regions[] =
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{
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{ 0x07000000, 0x1000000 }, /* security controller */
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{ 0x10000000, 0x30000000 }, /* SATA, IPU, GPU */
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{ 0x50000000, 0x20000000 }, /* Misc. */
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{ Trustzone::NONSECURE_RAM_BASE, Trustzone::NONSECURE_RAM_SIZE },
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};
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return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
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}
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Native_region * Platform::_core_only_mmio_regions(unsigned const i)
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{
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static Native_region _regions[] =
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{
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/* core UART */
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{ Board::UART_1_MMIO_BASE, Board::UART_1_MMIO_SIZE },
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/* core timer */
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{ Board::EPIT_1_MMIO_BASE, Board::EPIT_1_MMIO_SIZE },
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/* interrupt controller */
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{ Board::TZIC_MMIO_BASE, Board::TZIC_MMIO_SIZE },
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/* vm state memory */
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{ Trustzone::VM_STATE_BASE, Trustzone::VM_STATE_SIZE },
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};
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return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
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}
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Cpu::User_context::User_context() { cpsr = Psr::init_user_with_trustzone(); }
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