263 lines
6.9 KiB
C++
263 lines
6.9 KiB
C++
/*
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* \brief PCI-device interface
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* \author Norman Feske
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* \date 2008-01-28
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*/
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/*
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* Copyright (C) 2008-2017 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#ifndef _INCLUDE__SPEC__X86__PLATFORM_DEVICE__PLATFORM_DEVICE_H_
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#define _INCLUDE__SPEC__X86__PLATFORM_DEVICE__PLATFORM_DEVICE_H_
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#include <base/rpc.h>
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#include <base/signal.h>
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#include <base/exception.h>
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#include <base/ram_allocator.h>
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#include <io_mem_session/io_mem_session.h>
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#include <io_port_session/capability.h>
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#include <irq_session/capability.h>
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/* os includes */
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#include <platform_device/device.h>
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namespace Platform {
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struct Device;
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using Genode::Out_of_caps;
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using Genode::Out_of_ram;
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}
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struct Platform::Device : Platform::Abstract_device
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{
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/*********************
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** Exception types **
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*********************/
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class Resource
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{
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private:
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unsigned _bar = 0; /* content of base-address register */
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unsigned _size = 0; /* resource size */
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public:
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/**
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* Resource type, either port I/O resource or memory-mapped resource
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*/
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enum Type { IO, MEMORY, INVALID };
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/**
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* Default constructor
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*/
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Resource() { }
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/**
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* Constructor
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*
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* \param bar content of base-address register
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* \param size resource size
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*
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* This constructor is only used by the PCI bus driver
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* that implements the server-side of the the PCI session.
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* If bar is set to zero, the constructed resource description
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* represents an INVALID resource.
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*/
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Resource(unsigned bar, unsigned size)
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: _bar(bar), _size(size) { }
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/**
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* Return base address of resource
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*/
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unsigned base() const
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{
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/*
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* Mask out the resource-description bits of the base
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* address register. I/O resources use the lowest 3
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* bits, memory resources use the lowest 4 bits.
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*/
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return _bar & ((type() == IO) ? ~7 : ~15);
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}
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/**
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* Return resource size in bytes
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*/
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unsigned size() const { return _size; }
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/**
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* Return true if resource is prefetchable memory
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*/
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bool prefetchable() const
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{
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return type() == MEMORY && (_bar & (1 << 3));
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}
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/**
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* Return resource type
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*/
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Type type() const
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{
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if (_bar == 0)
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return INVALID;
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return (_bar & 1) ? IO : MEMORY;
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}
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/**
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* Return raw register content
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*/
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unsigned bar() const { return _bar; }
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};
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enum { NUM_RESOURCES = 6 };
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virtual ~Device() { }
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/**
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* Return bus, device, and function number of the device
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*/
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virtual void bus_address(unsigned char *bus, unsigned char *dev,
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unsigned char *fn) = 0;
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/**
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* Return vendor ID obtained from the PCI config space
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*/
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virtual unsigned short vendor_id() = 0;
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/**
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* Return device ID obtained from the PCI config space
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*/
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virtual unsigned short device_id() = 0;
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/**
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* Return device class code from the PCI config space
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*/
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virtual unsigned class_code() = 0;
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/**
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* Query PCI-resource information
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*
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* \param resource_id index of according PCI resource of the device
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*
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* \return resource description
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* \retval INVALID the supplied resource ID is invalid
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*/
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virtual Resource resource(int resource_id) = 0;
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/**
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* Access size for operations directly accessing the config space
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*/
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enum Access_size { ACCESS_8BIT, ACCESS_16BIT, ACCESS_32BIT };
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/**
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* Read configuration space
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*/
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virtual unsigned config_read(unsigned char address, Access_size size) = 0;
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/**
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* Write configuration space
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*
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* \throw Out_of_ram
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* \throw Out_of_caps
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*/
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virtual void config_write(unsigned char address, unsigned value,
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Access_size size) = 0;
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/**
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* Query Io_port of specified bar
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*
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* \param id index of according PCI resource of the device
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*
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* \throw Out_of_ram
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* \throw Out_of_caps
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*/
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virtual Genode::Io_port_session_capability io_port(Genode::uint8_t id) = 0;
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/*
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* The base classes are defined as follows:
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*
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* 0x00 | legacy device
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* 0x01 | mass-storage controller
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* 0x02 | network controller
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* 0x03 | display controller
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* 0x04 | multimedia device
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* 0x05 | memory controller
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* 0x06 | bridge device
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* 0x07 | simple-communication controller
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* 0x08 | base-system peripheral
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* 0x09 | input device
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* 0x0a | docking station
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* 0x0b | processor
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* 0x0c | serial bus controller
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* 0x0d | wireless controller
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* 0x0e | intelligent I/O controller
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* 0x0f | satellite-communications controller
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* 0x10 | encryption/decryption controller
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* 0x11 | data-acquisition and signal-processing controller
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* 0x12 | reserved
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* ... |
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* 0xff | device does not fit in any of the defined classes
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*/
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unsigned base_class() { return class_code() >> 16; }
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unsigned sub_class() { return (class_code() >> 8) & 0xff; }
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/**
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* Convenience method to translate a PCI physical BAR id to a Genode
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* virtual one usable with the io_port and io_mem methods. The virtual id
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* is solely valid for the specific BAR type.
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*/
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Genode::uint8_t phys_bar_to_virt(Genode::uint8_t phys_bar)
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{
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Genode::uint8_t virt_io_port = 0, virt_io_mem = 0;
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for (unsigned i = 0; i < phys_bar; i++) {
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Resource::Type type = resource(i).type();
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if (type == Resource::Type::IO)
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virt_io_port ++;
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else if (type == Resource::Type::MEMORY)
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virt_io_mem ++;
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}
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Resource::Type type = resource(phys_bar).type();
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return type == Resource::Type::IO ? virt_io_port : virt_io_mem;
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}
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/*********************
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** RPC declaration **
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*********************/
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GENODE_RPC(Rpc_bus_address, void, bus_address,
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unsigned char *, unsigned char *, unsigned char *);
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GENODE_RPC(Rpc_vendor_id, unsigned short, vendor_id);
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GENODE_RPC(Rpc_device_id, unsigned short, device_id);
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GENODE_RPC(Rpc_class_code, unsigned, class_code);
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GENODE_RPC(Rpc_resource, Resource, resource, int);
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GENODE_RPC(Rpc_config_read, unsigned, config_read,
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unsigned char, Access_size);
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GENODE_RPC_THROW(Rpc_config_write, void, config_write,
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GENODE_TYPE_LIST(Out_of_ram, Out_of_caps),
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unsigned char, unsigned, Access_size);
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GENODE_RPC(Rpc_irq, Genode::Irq_session_capability, irq, Genode::uint8_t);
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GENODE_RPC_THROW(Rpc_io_port, Genode::Io_port_session_capability, io_port,
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GENODE_TYPE_LIST(Out_of_ram, Out_of_caps),
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Genode::uint8_t);
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GENODE_RPC_THROW(Rpc_io_mem, Genode::Io_mem_session_capability, io_mem,
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GENODE_TYPE_LIST(Out_of_ram, Out_of_caps),
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Genode::uint8_t, Genode::Cache_attribute,
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Genode::addr_t, Genode::size_t);
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GENODE_RPC_INTERFACE(Rpc_bus_address, Rpc_vendor_id, Rpc_device_id,
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Rpc_class_code, Rpc_resource, Rpc_config_read,
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Rpc_config_write, Rpc_irq, Rpc_io_port, Rpc_io_mem);
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};
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#endif /* _INCLUDE__SPEC__X86__PLATFORM_DEVICE__PLATFORM_DEVICE_H_ */
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