174 lines
8.0 KiB
C++
174 lines
8.0 KiB
C++
/*
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* \brief Fiasco.OC(ARM)-specific helper functions for GDB server
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* \author Christian Prochaska
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* \date 2011-08-01
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*/
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/*
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* Copyright (C) 2011-2013 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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extern "C" {
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#define private _private
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#include "genode-low.h"
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#define _private private
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}
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#include <base/printf.h>
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#include "cpu_session_component.h"
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#include "reg-arm.h"
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#include "gdbserver_platform_helper.h"
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#include "gdb_stub_thread.h"
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#undef PDBG
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#define PDBG(...)
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using namespace Genode;
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static bool in_syscall(Thread_state const &thread_state)
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{
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/* looking for syscall pattern:
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* (PC-8: e1a0e00f mov lr, pc)
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* PC-4: e3e0f00b mvn pc, #11
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* (PC: e1a02004 mov r2, r4)
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*/
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if ((genode_read_memory_byte((void*)(thread_state.ip - 1)) == 0xe3) &&
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(genode_read_memory_byte((void*)(thread_state.ip - 2)) == 0xe0) &&
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(genode_read_memory_byte((void*)(thread_state.ip - 3)) == 0xf0) &&
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(genode_read_memory_byte((void*)(thread_state.ip - 4)) == 0x0b))
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return true;
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return false;
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}
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extern "C" int genode_fetch_register(int regno, unsigned long *reg_content)
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{
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Thread_state thread_state;
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try { thread_state = get_current_thread_state(); }
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catch (...) { return 0; }
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if (in_syscall(thread_state)) {
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switch((enum reg_index)regno)
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{
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case R0: PDBG("cannot determine contents of register R0"); return -1;
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case R1: PDBG("cannot determine contents of register R1"); return -1;
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case R2: PDBG("cannot determine contents of register R2"); return -1;
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case R3: PDBG("cannot determine contents of register R3"); return -1;
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case R4: PDBG("cannot determine contents of register R4"); return -1;
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case R5: PDBG("cannot determine contents of register R5"); return -1;
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case R6: PDBG("cannot determine contents of register R6"); return -1;
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case R7: PDBG("cannot determine contents of register R7"); return -1;
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case R8: PDBG("cannot determine contents of register R8"); return -1;
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case R9: PDBG("cannot determine contents of register R9"); return -1;
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case R10: PDBG("cannot determine contents of register R10"); return -1;
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case R11:
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/* R11 can be calculated from SP. The offset can be found in
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* the disassembled 'Fiasco::l4_ipc()' function:
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* add r11, sp, #8 -> r11 = sp + 8
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* sub sp, sp, #20 -> r11 = (sp + 20) + 8
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*/
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*reg_content = (thread_state.sp + 20) + 8;
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PDBG("FP = %8lx", *reg_content);
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return 0;
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case R12: PDBG("cannot determine contents of register R12"); return -1;
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case SP: *reg_content = thread_state.sp; PDBG("SP = %8lx", *reg_content); return 0;
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case LR: PDBG("cannot determine contents of register LR"); return -1;
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case PC: *reg_content = thread_state.ip; PDBG("PC = %8lx", *reg_content); return 0;
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case F0: PDBG("cannot determine contents of register F0"); return -1;
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case F1: PDBG("cannot determine contents of register F1"); return -1;
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case F2: PDBG("cannot determine contents of register F2"); return -1;
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case F3: PDBG("cannot determine contents of register F3"); return -1;
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case F4: PDBG("cannot determine contents of register F4"); return -1;
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case F5: PDBG("cannot determine contents of register F5"); return -1;
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case F6: PDBG("cannot determine contents of register F6"); return -1;
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case F7: PDBG("cannot determine contents of register F7"); return -1;
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case FPS: PDBG("cannot determine contents of register FPS"); return -1;
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case CPSR: PDBG("cannot determine contents of register CPSR"); return -1;
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}
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} else {
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switch((enum reg_index)regno)
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{
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case R0: *reg_content = thread_state.r0; PDBG("R0 = %8lx", *reg_content); return 0;
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case R1: *reg_content = thread_state.r1; PDBG("R1 = %8lx", *reg_content); return 0;
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case R2: *reg_content = thread_state.r2; PDBG("R2 = %8lx", *reg_content); return 0;
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case R3: *reg_content = thread_state.r3; PDBG("R3 = %8lx", *reg_content); return 0;
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case R4: *reg_content = thread_state.r4; PDBG("R4 = %8lx", *reg_content); return 0;
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case R5: *reg_content = thread_state.r5; PDBG("R5 = %8lx", *reg_content); return 0;
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case R6: *reg_content = thread_state.r6; PDBG("R6 = %8lx", *reg_content); return 0;
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case R7: *reg_content = thread_state.r7; PDBG("R7 = %8lx", *reg_content); return 0;
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case R8: *reg_content = thread_state.r8; PDBG("R8 = %8lx", *reg_content); return 0;
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case R9: *reg_content = thread_state.r9; PDBG("R9 = %8lx", *reg_content); return 0;
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case R10: *reg_content = thread_state.r10; PDBG("R10 = %8lx", *reg_content); return 0;
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case R11: *reg_content = thread_state.r11; PDBG("FP = %8lx", *reg_content); return 0;
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case R12: *reg_content = thread_state.r12; PDBG("R12 = %8lx", *reg_content); return 0;
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case SP: *reg_content = thread_state.sp; PDBG("SP = %8lx", *reg_content); return 0;
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case LR: *reg_content = thread_state.lr; PDBG("LR = %8lx", *reg_content); return 0;
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case PC: *reg_content = thread_state.ip; PDBG("PC = %8lx", *reg_content); return 0;
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case F0: PDBG("cannot determine contents of register F0"); return -1;
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case F1: PDBG("cannot determine contents of register F1"); return -1;
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case F2: PDBG("cannot determine contents of register F2"); return -1;
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case F3: PDBG("cannot determine contents of register F3"); return -1;
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case F4: PDBG("cannot determine contents of register F4"); return -1;
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case F5: PDBG("cannot determine contents of register F5"); return -1;
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case F6: PDBG("cannot determine contents of register F6"); return -1;
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case F7: PDBG("cannot determine contents of register F7"); return -1;
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case FPS: PDBG("cannot determine contents of register FPS"); return -1;
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case CPSR: *reg_content = thread_state.cpsr; PDBG("CPSR = %8lx", *reg_content); return 0;
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}
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}
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return -1;
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}
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extern "C" void genode_store_register(int regno, unsigned long reg_content)
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{
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Thread_state thread_state;
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try { thread_state = get_current_thread_state(); }
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catch (...) { return; }
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if (in_syscall(thread_state)) {
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PDBG("cannot set registers while thread is in syscall");
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return;
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}
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switch((enum reg_index)regno)
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{
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case R0: thread_state.r0 = reg_content; PDBG("R0 = %8lx", reg_content); break;
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case R1: thread_state.r1 = reg_content; PDBG("R1 = %8lx", reg_content); break;
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case R2: thread_state.r2 = reg_content; PDBG("R2 = %8lx", reg_content); break;
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case R3: thread_state.r3 = reg_content; PDBG("R3 = %8lx", reg_content); break;
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case R4: thread_state.r4 = reg_content; PDBG("R4 = %8lx", reg_content); break;
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case R5: thread_state.r5 = reg_content; PDBG("R5 = %8lx", reg_content); break;
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case R6: thread_state.r6 = reg_content; PDBG("R6 = %8lx", reg_content); break;
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case R7: thread_state.r7 = reg_content; PDBG("R7 = %8lx", reg_content); break;
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case R8: thread_state.r8 = reg_content; PDBG("R8 = %8lx", reg_content); break;
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case R9: thread_state.r9 = reg_content; PDBG("R9 = %8lx", reg_content); break;
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case R10: thread_state.r10 = reg_content; PDBG("R10 = %8lx", reg_content); break;
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case R11: thread_state.r11 = reg_content; PDBG("FP = %8lx", reg_content); break;
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case R12: thread_state.r12 = reg_content; PDBG("R12 = %8lx", reg_content); break;
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case SP: thread_state.sp = reg_content; PDBG("SP = %8lx", reg_content); break;
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case LR: thread_state.lr = reg_content; PDBG("LR = %8lx", reg_content); break;
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case PC: thread_state.ip = reg_content; PDBG("PC = %8lx", reg_content); break;
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case F0: PDBG("cannot set contents of register F0"); break;
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case F1: PDBG("cannot set contents of register F1"); break;
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case F2: PDBG("cannot set contents of register F2"); break;
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case F3: PDBG("cannot set contents of register F3"); break;
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case F4: PDBG("cannot set contents of register F4"); break;
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case F5: PDBG("cannot set contents of register F5"); break;
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case F6: PDBG("cannot set contents of register F6"); break;
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case F7: PDBG("cannot set contents of register F7"); break;
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case FPS: PDBG("cannot set contents of register FPS"); break;
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case CPSR: thread_state.cpsr = reg_content; PDBG("CPSR = %8lx", reg_content); break;
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}
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set_current_thread_state(thread_state);
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}
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