78 lines
2.2 KiB
C++
78 lines
2.2 KiB
C++
/*
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* \brief Programmable interrupt controller for core
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* \author Stefan Kalkowski
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* \date 2012-10-24
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*/
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/*
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* Copyright (C) 2012-2019 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#include <board.h>
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Hw::Gicv2::Gicv2()
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: _distr(Board::Cpu_mmio::IRQ_CONTROLLER_DISTR_BASE),
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_cpui (Board::Cpu_mmio::IRQ_CONTROLLER_CPU_BASE),
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_last_iar(Cpu_interface::Iar::Irq_id::bits(spurious_id)),
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_max_irq(_distr.max_irq())
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{
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static bool distributor_initialized = false;
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bool use_group_1 = Board::NON_SECURE &&
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_distr.read<Distributor::Typer::Security_extension>();
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if (!distributor_initialized) {
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distributor_initialized = true;
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/* disable device */
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_distr.write<Distributor::Ctlr>(0);
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/* configure every shared peripheral interrupt */
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for (unsigned i = min_spi; i <= _max_irq; i++) {
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if (use_group_1) {
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_distr.write<Distributor::Igroupr::Group_status>(1, i);
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}
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_distr.write<Distributor::Icfgr::Edge_triggered>(0, i);
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_distr.write<Distributor::Ipriorityr::Priority>(0, i);
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_distr.write<Distributor::Icenabler::Clear_enable>(1, i);
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}
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/* enable device */
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Distributor::Ctlr::access_t v = 0;
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if (use_group_1) {
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Distributor::Ctlr::Enable_grp0::set(v, 1);
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Distributor::Ctlr::Enable_grp1::set(v, 1);
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} else {
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Distributor::Ctlr::Enable::set(v, 1);
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}
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_distr.write<Distributor::Ctlr>(v);
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}
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if (use_group_1) {
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_cpui.write<Cpu_interface::Ctlr>(0);
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/* mark software-generated IRQs as being non-secure */
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for (unsigned i = 0; i < min_spi; i++)
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_distr.write<Distributor::Igroupr::Group_status>(1, i);
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}
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/* disable the priority filter */
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_cpui.write<Cpu_interface::Pmr::Priority>(_distr.min_priority());
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/* disable preemption of IRQ handling by other IRQs */
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_cpui.write<Cpu_interface::Bpr::Binary_point>(~0);
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/* enable device */
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Cpu_interface::Ctlr::access_t v = 0;
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if (use_group_1) {
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Cpu_interface::Ctlr::Enable_grp0::set(v, 1);
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Cpu_interface::Ctlr::Enable_grp1::set(v, 1);
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Cpu_interface::Ctlr::Fiq_en::set(v, 1);
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} else {
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Cpu_interface::Ctlr::Enable::set(v, 1);
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}
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_cpui.write<Cpu_interface::Ctlr>(v);
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}
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