120 lines
3.1 KiB
C++
120 lines
3.1 KiB
C++
/*
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* \brief Board driver for core on pandaboard
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* \author Stefan Kalkowski
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* \date 2014-06-02
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*/
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/*
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* Copyright (C) 2014 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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/* core includes */
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#include <util/mmio.h>
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#include <spec/cortex_a9/board_support.h>
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namespace Genode
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{
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struct Board : Cortex_a9::Board
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{
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/**
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* L2 outer cache controller
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*/
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struct Pl310 : Mmio {
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enum Trustzone_hypervisor_syscalls {
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L2_CACHE_SET_DEBUG_REG = 0x100,
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L2_CACHE_ENABLE_REG = 0x102,
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L2_CACHE_AUX_REG = 0x109,
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};
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static inline void
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trustzone_hypervisor_call(addr_t func, addr_t val)
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{
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register addr_t _func asm("r12") = func;
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register addr_t _val asm("r0") = val;
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asm volatile("dsb; smc #0" :: "r" (_func), "r" (_val)
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: "memory", "cc", "r1", "r2", "r3", "r4", "r5",
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"r6", "r7", "r8", "r9", "r10", "r11");
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}
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struct Control : Register <0x100, 32>
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{
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struct Enable : Bitfield<0,1> {};
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};
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struct Aux : Register<0x104, 32>
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{
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struct Associativity : Bitfield<16,1> { };
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struct Way_size : Bitfield<17,3> { };
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struct Share_override : Bitfield<22,1> { };
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struct Reserved : Bitfield<25,1> { };
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struct Ns_lockdown : Bitfield<26,1> { };
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struct Ns_irq_ctrl : Bitfield<27,1> { };
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struct Data_prefetch : Bitfield<28,1> { };
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struct Inst_prefetch : Bitfield<29,1> { };
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struct Early_bresp : Bitfield<30,1> { };
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static access_t init_value()
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{
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access_t v = 0;
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Associativity::set(v, 1);
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Way_size::set(v, 3);
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Share_override::set(v, 1);
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Reserved::set(v, 1);
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Ns_lockdown::set(v, 1);
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Ns_irq_ctrl::set(v, 1);
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Data_prefetch::set(v, 1);
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Inst_prefetch::set(v, 1);
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Early_bresp::set(v, 1);
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return v;
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}
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};
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struct Irq_mask : Register <0x214, 32> {};
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struct Irq_clear : Register <0x220, 32> {};
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struct Cache_sync : Register <0x730, 32> {};
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struct Invalidate_by_way : Register <0x77c, 32> {};
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struct Clean_invalidate_by_way : Register <0x7fc, 32> {};
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inline void sync() { while (read<Cache_sync>()) ; }
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void invalidate()
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{
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write<Invalidate_by_way>((1 << 16) - 1);
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sync();
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}
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void flush()
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{
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trustzone_hypervisor_call(L2_CACHE_SET_DEBUG_REG, 0x3);
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write<Clean_invalidate_by_way>((1 << 16) - 1);
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sync();
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trustzone_hypervisor_call(L2_CACHE_SET_DEBUG_REG, 0x0);
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}
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Pl310(addr_t const base) : Mmio(base)
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{
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trustzone_hypervisor_call(L2_CACHE_AUX_REG,
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Pl310::Aux::init_value());
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trustzone_hypervisor_call(L2_CACHE_ENABLE_REG, 1);
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write<Irq_mask>(0);
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write<Irq_clear>(0xffffffff);
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}
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};
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static void outer_cache_invalidate();
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static void outer_cache_flush();
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static void prepare_kernel();
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static void secondary_cpus_ip(void * const ip) { }
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static bool is_smp() { return true; }
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};
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}
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#endif /* _BOARD_H_ */
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