316 lines
7.0 KiB
C++
316 lines
7.0 KiB
C++
/*
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* \brief Hardware emulation implementation
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* \author Christian Helmuth
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* \author Stefan Kalkowski
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* \date 2010-06-01
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*
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* The emulation comprises:
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*
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* - Simple programmable interval timer (PIT)
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* - Virtual PCI bus with VGA card attached to its physical slot
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*/
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/*
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* Copyright (C) 2010-2013 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#include <base/sleep.h>
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#include <base/printf.h>
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#include "hw_emul.h"
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using namespace Genode;
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static const bool verbose = false;
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/************************
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** PCI virtualization **
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************************/
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#include <pci_session/connection.h>
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#include <pci_device/client.h>
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enum {
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PCI_ADDR_REG = 0xcf8,
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PCI_DATA_REG = 0xcfc
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};
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class Pci_card
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{
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private:
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Pci::Connection _pci_drv;
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Pci::Device_client _device;
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unsigned short _devfn;
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Pci::Device_capability _find_vga_card()
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{
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/*
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* Iterate through all accessible devices.
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*/
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Pci::Device_capability prev_device_cap, device_cap;
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Genode::env()->parent()->upgrade(_pci_drv.cap(), "ram_quota=4096");
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for (device_cap = _pci_drv.first_device();
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device_cap.valid();
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device_cap = _pci_drv.next_device(prev_device_cap)) {
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Pci::Device_client device(device_cap);
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if (prev_device_cap.valid())
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_pci_drv.release_device(prev_device_cap);
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/*
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* If the device is an VGA compatible controller with base
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* class 0x03 and sub class 0x00 stop iteration. (We shift out
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* the interface bits.)
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*/
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if ((device.class_code() >> 8) == 0x0300)
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break;
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prev_device_cap = device_cap;
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}
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if (!device_cap.valid()) {
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PERR("PCI VGA card not found. Sleeping...");
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sleep_forever();
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}
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return device_cap;
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}
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public:
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Pci_card() : _pci_drv(), _device(_find_vga_card())
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{
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unsigned char bus = 0, dev = 0, fn = 0;
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_device.bus_address(&bus, &dev, &fn);
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_devfn = bus << 8 | dev << 3 | fn;
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if (verbose)
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PDBG("Found PCI VGA at %x:%x.%x", bus, dev, fn);
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}
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Pci::Device_client &device() { return _device; }
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unsigned short devfn() const { return _devfn; }
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};
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static Pci_card *pci_card()
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{
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static Pci_card _pci_card;
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return &_pci_card;
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}
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/**
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* Last address written to address port.
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*/
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static unsigned pci_cfg_addr;
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static bool pci_cfg_addr_valid = false;
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template <typename T>
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static bool handle_pci_port_write(unsigned short port, T val)
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{
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switch (port) {
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case PCI_ADDR_REG:
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/*
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* The virtual bus has only 1 device - the VGA card - at its physical
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* bus address.
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*/
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{
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if (sizeof(T) != 4) {
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PWRN("writing with size %zx not supported", sizeof(T));
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return true;
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}
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unsigned devfn = (val >> 8) & 0xffff;
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if (devfn != pci_card()->devfn()) {
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if (verbose)
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PWRN("accessing unknown PCI device %02x:%02x.%x",
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devfn >> 8, (devfn >> 3) & 0x1f, devfn & 0x7);
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pci_cfg_addr_valid = false;
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return true;
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}
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/* remember the configuration address */
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pci_cfg_addr = val & 0xfc;
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pci_cfg_addr_valid = true;
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return true;
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}
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case PCI_DATA_REG:
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PWRN("writing data register not supported (value=0x%x)", (int)val);
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return true;
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default:
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return false;
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}
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}
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template <typename T>
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static bool handle_pci_port_read(unsigned short port, T *val)
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{
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unsigned raw_val;
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*val = 0;
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switch (port & ~3) {
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case PCI_ADDR_REG:
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*val = pci_cfg_addr;
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return true;
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case PCI_DATA_REG:
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{
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unsigned off_bits = (port & 3) * 8;
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if (!pci_cfg_addr_valid) {
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/*
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* XXX returning -1 here for "invalid PCI device" breaks Qemu's
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* Cirrus VGA BIOS.
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*/
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*val = 0;
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return true;
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}
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switch (pci_cfg_addr) {
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case 0: /* vendor / device ID */
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raw_val = pci_card()->device().vendor_id() |
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(pci_card()->device().device_id() << 16);
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break;
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case 4: /* status and command */
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case 8: /* class code / revision ID */
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raw_val = pci_card()->device().config_read(pci_cfg_addr,
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Pci::Device::ACCESS_32BIT);
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break;
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case 0x10: /* base address register 0 */
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case 0x14: /* base address register 1 */
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case 0x18: /* base address register 2 */
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case 0x1c: /* base address register 3 */
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case 0x20: /* base address register 4 */
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case 0x24: /* base address register 5 */
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{
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unsigned bar = (pci_cfg_addr - 0x10) / 4;
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Pci::Device::Resource res = pci_card()->device().resource(bar);
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if (res.type() == Pci::Device::Resource::INVALID) {
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PWRN("requested PCI resource 0x%x invalid", bar);
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*val = 0;
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return true;
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}
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raw_val = res.bar();
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break;
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}
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default:
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PWRN("unexpected configuration address 0x%x", pci_cfg_addr);
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return true;
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}
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*val = raw_val >> off_bits;
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return true;
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}
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default:
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return false;
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}
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}
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/************************
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** PIT virtualization **
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************************/
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/*
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* Some VESA BIOS implementations use the PIT as time source. However, usually
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* only the PIT counter is queried by first writing a latch command (0) to the
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* command register and subsequently reading the data port two times (low word
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* and high word). Returning non-zero bogus values seems to make (at least
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* some) VESA BIOS implementations happy.
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*/
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enum {
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PIT_DATA_PORT_0 = 0x40,
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PIT_CMD_PORT = 0x43,
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};
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/**
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* Handle port-write access to the PIT
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*
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* \return true if the port access referred to the PIT
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*/
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template <typename T>
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static bool handle_pit_port_write(unsigned short port, T val)
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{
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if (port >= PIT_DATA_PORT_0 && port <= PIT_CMD_PORT)
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return true;
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return false;
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}
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/**
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* Handle port-read access from the PIT registers
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*
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* \return true if the port access referred to the PIT
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*/
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template <typename T>
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static bool handle_pit_port_read(unsigned short port, T *val)
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{
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if (port >= PIT_DATA_PORT_0 && port <= PIT_CMD_PORT) {
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*val = 0x15; /* bogus value */
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return true;
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}
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return false;
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}
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/************************
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** API implementation **
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************************/
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/* instantiate externally used template funciton */
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template bool hw_emul_handle_port_read(unsigned short port, unsigned char *val);
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template bool hw_emul_handle_port_read(unsigned short port, unsigned short *val);
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template bool hw_emul_handle_port_read(unsigned short port, unsigned long *val);
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template bool hw_emul_handle_port_read(unsigned short port, unsigned int *val);
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template bool hw_emul_handle_port_write(unsigned short port, unsigned char val);
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template bool hw_emul_handle_port_write(unsigned short port, unsigned short val);
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template bool hw_emul_handle_port_write(unsigned short port, unsigned long val);
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template bool hw_emul_handle_port_write(unsigned short port, unsigned int val);
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template <typename T>
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bool hw_emul_handle_port_read(unsigned short port, T *val)
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{
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T ret;
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if (handle_pci_port_read(port, &ret)
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|| handle_pit_port_read(port, &ret)) {
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*val = ret;
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return true;
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}
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return false;
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}
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template <typename T>
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bool hw_emul_handle_port_write(unsigned short port, T val)
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{
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if (handle_pci_port_write(port, val)
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|| handle_pit_port_write(port, val))
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return true;
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return false;
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}
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