genode/repos/base-hw/src/core/spec/x86_64
Adrian-Ken Rueegsegger 4946f21302 hw_x86_64: Set base address and limit of TSS descriptor
The limit is set to match the TSS size - 1 and the base address is
hardcoded to the *current* address of the TSS instance (0x3a1100).

TODO: Set the base address using the 'tss' label. If the TSS descriptor
      format were not so utterly unusable this would be straightforward.
      Changes to the code that indirectly lead to a different location
      of the tss result in #GP since the base address will be invalid.
2015-03-27 11:53:23 +01:00
..
kernel hw_x86_64: Set base address and limit of TSS descriptor 2015-03-27 11:53:23 +01:00
crt0.s hw: skeleton for building on x86_64 2015-03-27 11:53:16 +01:00
idt.cc hw_x86_64: Set dpl of syscall IDT entry to 3 2015-03-27 11:53:22 +01:00
isr.s hw_x86_64: Jump to actual kernel entry on interrupt 2015-03-27 11:53:23 +01:00
mode_transition.s hw_x86_64: Continue execution of the kernel 2015-03-27 11:53:22 +01:00
tss.cc hw_x86_64: Add Tss class 2015-03-27 11:53:23 +01:00