399e1586be
There are hardware timers whose frequency can't be expressed as ticks-per-microsecond integer-value because only a ticks-per-millisecond integer-value is precise enough. We don't want to use expensive floating-point values here but nonetheless want to translate from ticks to time with microseconds precision. Thus, we split the input in two and translate both parts separately. This way, we can raise precision by shifting the values to their optimal bit position. Afterwards, the results are shifted back and merged together again. As this algorithm is not so trivial anymore and used by at least three timer drivers (base-hw/x86_64, base-hw/cortex_a9, timer/pit), move it to a generic header to avoid redundancy. Ref #2400
116 lines
3.0 KiB
C++
116 lines
3.0 KiB
C++
/*
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* \brief Time source that uses the Programmable Interval Timer (PIT)
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* \author Norman Feske
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* \author Martin Stein
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* \date 2009-06-16
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*/
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/*
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* Copyright (C) 2009-2017 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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/* Genode includes */
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#include <drivers/timer/util.h>
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/* local includes */
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#include <time_source.h>
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using namespace Genode;
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void Timer::Time_source::_set_counter(uint16_t value)
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{
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_handled_wrap = false;
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_io_port.outb(PIT_DATA_PORT_0, value & 0xff);
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_io_port.outb(PIT_DATA_PORT_0, (value >> 8) & 0xff);
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}
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uint16_t Timer::Time_source::_read_counter(bool *wrapped)
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{
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/* read-back count and status of counter 0 */
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_io_port.outb(PIT_CMD_PORT, PIT_CMD_READ_BACK |
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PIT_CMD_RB_COUNT |
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PIT_CMD_RB_STATUS |
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PIT_CMD_RB_CHANNEL_0);
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/* read status byte from latch register */
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uint8_t status = _io_port.inb(PIT_DATA_PORT_0);
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/* read low and high bytes from latch register */
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uint16_t lo = _io_port.inb(PIT_DATA_PORT_0);
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uint16_t hi = _io_port.inb(PIT_DATA_PORT_0);
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*wrapped = status & PIT_STAT_INT_LINE ? true : false;
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return (hi << 8) | lo;
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}
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void Timer::Time_source::schedule_timeout(Microseconds duration,
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Timeout_handler &handler)
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{
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_handler = &handler;
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_timer_irq.ack_irq();
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unsigned long duration_us = duration.value;
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/* limit timer-interrupt rate */
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enum { MAX_TIMER_IRQS_PER_SECOND = 4*1000 };
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if (duration_us < 1000 * 1000 / MAX_TIMER_IRQS_PER_SECOND)
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duration_us = 1000 * 1000 / MAX_TIMER_IRQS_PER_SECOND;
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if (duration_us > max_timeout().value)
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duration_us = max_timeout().value;
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_counter_init_value = (PIT_TICKS_PER_MSEC * duration_us) / 1000;
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_set_counter(_counter_init_value);
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}
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Duration Timer::Time_source::curr_time()
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{
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uint32_t ticks;
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/* read PIT count and status */
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bool wrapped;
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uint16_t const curr_counter = _read_counter(&wrapped);
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/* determine the time since we looked at the counter */
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if (wrapped && !_handled_wrap) {
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ticks = _counter_init_value;
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/* the counter really wrapped around */
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if (curr_counter)
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ticks += PIT_MAX_COUNT + 1 - curr_counter;
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_handled_wrap = true;
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} else {
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if (_counter_init_value)
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ticks = _counter_init_value - curr_counter;
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else
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ticks = PIT_MAX_COUNT + 1 - curr_counter;
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}
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static_assert(PIT_TICKS_PER_MSEC >= 1000, "Bad TICS_PER_MS value");
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_curr_time_us += timer_ticks_to_us(ticks, PIT_TICKS_PER_MSEC);
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/* use current counter as the reference for the next update */
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_counter_init_value = curr_counter;
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return Duration(Microseconds(_curr_time_us));
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}
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Timer::Time_source::Time_source(Env &env)
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:
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Signalled_time_source(env),
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_io_port(env, PIT_DATA_PORT_0, PIT_CMD_PORT - PIT_DATA_PORT_0 + 1),
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_timer_irq(env, IRQ_PIT)
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{
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/* operate PIT in one-shot mode */
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_io_port.outb(PIT_CMD_PORT, PIT_CMD_SELECT_CHANNEL_0 |
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PIT_CMD_ACCESS_LO_HI | PIT_CMD_MODE_IRQ);
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_timer_irq.sigh(_signal_handler);
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}
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