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Mark Vels 1668983efa base-hw: RISC-V Rocket Core on Zynq 
This commit adds rocket core on the Zynq FPGA support to base HW. It also takes
advantage of the new timer infrastructure introduced with the privileged 1.8 and
adds improved TLB flush support.

fixes #1880
 		2016-02-26 11:36:51 +01:00
..
arm hw: re-implement lazy FPU context switch 2016-01-26 16:20:38 +01:00
arm_gic hw: construct kernel irq objects on demand 2015-04-17 16:13:21 +02:00
arm_v6 hw: enable SMP for ARM Cortex A9 2016-01-26 16:20:18 +01:00
arm_v7 hw: enable SMP for ARM Cortex A9 2016-01-26 16:20:18 +01:00
arndale hw: enable SMP for ARM Cortex A9 2016-01-26 16:20:18 +01:00
cortex_a8 hw: enable SMP for ARM Cortex A9 2016-01-26 16:20:18 +01:00
cortex_a9 hw: re-implement lazy FPU context switch 2016-01-26 16:20:38 +01:00
cortex_a15 hw: enable SMP for ARM Cortex A9 2016-01-26 16:20:18 +01:00
exynos5 hw: enable SMP for ARM Cortex A9 2016-01-26 16:20:18 +01:00
imx6 hw: re-implement lazy FPU context switch 2016-01-26 16:20:38 +01:00
imx53 hw: enable SMP for ARM Cortex A9 2016-01-26 16:20:18 +01:00
panda hw: re-implement lazy FPU context switch 2016-01-26 16:20:38 +01:00
pbxa9 hw: re-implement lazy FPU context switch 2016-01-26 16:20:38 +01:00
riscv base-hw: RISC-V Rocket Core on Zynq 2016-02-26 11:36:51 +01:00
rpi hw_x86_64: Add x86-specific I/O mem allocator init 2015-05-26 09:39:45 +02:00
smp/kernel hw: enable SMP for ARM Cortex A9 2016-01-26 16:20:18 +01:00
x86 hw: re-implement lazy FPU context switch 2016-01-26 16:20:38 +01:00
x86_64 hw: re-implement lazy FPU context switch 2016-01-26 16:20:38 +01:00
zynq hw: re-implement lazy FPU context switch 2016-01-26 16:20:38 +01:00