164 lines
3.7 KiB
C++
164 lines
3.7 KiB
C++
/*
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* \brief CPU driver for core
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* \author Sebastian Sumpf
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* \date 2015-06-02
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*/
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/*
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* Copyright (C) 2015-2016 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#ifndef _CPU_H_
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#define _CPU_H_
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/* Genode includes */
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#include <base/stdint.h>
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#include <cpu/cpu_state.h>
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namespace Genode
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{
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/**
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* CPU driver for core
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*/
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class Cpu;
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typedef __uint128_t sizet_arithm_t;
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}
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namespace Kernel { class Pd; }
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class Genode::Cpu
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{
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public:
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static constexpr addr_t mtc_size = 0x1000;
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static constexpr addr_t exception_entry = (~0ULL) & ~(0xfff);
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/**
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* Extend basic CPU state by members relevant for 'base-hw' only
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*/
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struct Context : Cpu_state
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{
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addr_t sasid = 0;
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addr_t sptbr = 0; /* supervisor page table register */
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/**
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* Return base of assigned translation table
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*/
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addr_t translation_table() const { return sptbr; }
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/**
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* Assign translation-table base 'table'
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*/
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void translation_table(addr_t const table) { sptbr = table; }
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/**
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* Assign protection domain
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*/
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void protection_domain(Genode::uint8_t const id) { sasid = id; }
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};
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struct Pd
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{
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Genode::uint8_t asid; /* address space id */
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Pd(Genode::uint8_t id) : asid(id) {}
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};
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/**
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* A usermode execution state
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*/
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struct User_context : Context
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{
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/**
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* Constructor
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*/
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User_context();
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/**
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* Support for kernel calls
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*/
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void user_arg_0(unsigned const arg) { a0 = arg; }
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void user_arg_1(unsigned const arg) { a1 = arg; }
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void user_arg_2(unsigned const arg) { a2 = arg; }
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void user_arg_3(unsigned const arg) { a3 = arg; }
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void user_arg_4(unsigned const arg) { a4 = arg; }
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addr_t user_arg_0() const { return a0; }
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addr_t user_arg_1() const { return a1; }
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addr_t user_arg_2() const { return a2; }
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addr_t user_arg_3() const { return a3; }
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addr_t user_arg_4() const { return a4; }
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/**
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* Initialize thread context
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*
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* \param table physical base of appropriate translation table
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* \param pd_id kernel name of appropriate protection domain
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*/
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void init_thread(addr_t const table, unsigned const pd_id)
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{
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protection_domain(pd_id);
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translation_table(table);
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}
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};
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static void wait_for_interrupt() { asm volatile ("wfi"); };
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/**
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* From the manual
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*
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* The behavior of SFENCE.VM depends on the current value of the sasid
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* register. If sasid is nonzero, SFENCE.VM takes effect only for address
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* translations in the current address space. If sasid is zero, SFENCE.VM
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* affects address translations for all address spaces. In this case, it
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* also affects global mappings, which are described in Section 4.5.1.
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*
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* Right no we will flush anything
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*/
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static void sfence()
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{
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asm volatile ("csrrw t0, sasid, x0\n"
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"sfence.vm\n"
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"csrw sasid, t0\n"
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: : : "t0");
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}
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/**
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* Post processing after a translation was added to a translation table
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*
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* \param addr virtual address of the translation
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* \param size size of the translation
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*/
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static void translation_added(addr_t const addr, size_t const size);
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static void invalidate_tlb_by_pid(unsigned const pid) { sfence(); }
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/**
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* Return kernel name of the executing CPU
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*/
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static unsigned executing_id() { return primary_id(); }
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/**
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* Return kernel name of the primary CPU
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*/
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static unsigned primary_id() { return 0; }
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static addr_t sbadaddr()
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{
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addr_t addr;
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asm volatile ("csrr %0, sbadaddr\n" : "=r"(addr));
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return addr;
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}
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/*************
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** Dummies **
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*************/
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void switch_to(User_context&) { }
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};
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#endif /* _CPU_H_ */
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