146 lines
2.8 KiB
C++
146 lines
2.8 KiB
C++
/*
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* \brief Timer for core
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* \author Martin stein
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* \date 2013-01-10
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*/
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/*
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* Copyright (C) 2013 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#ifndef _TIMER__EXYNOS_MCT_H_
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#define _TIMER__EXYNOS_MCT_H_
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/* Genode includes */
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#include <util/mmio.h>
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namespace Exynos_mct
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{
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using namespace Genode;
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/**
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* Timer for core
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*/
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class Timer : public Mmio
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{
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enum {
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PRESCALER = 1,
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DIV_MUX = 0,
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};
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/**
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* MCT configuration
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*/
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struct Mct_cfg : Register<0x0, 32>
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{
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struct Prescaler : Bitfield<0, 8> { };
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struct Div_mux : Bitfield<8, 3> { };
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};
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/**
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* Local timer 0 free running counter buffer
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*/
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struct L0_frcntb : Register<0x310, 32> { };
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/**
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* Local timer 0 configuration
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*/
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struct L0_tcon : Register<0x320, 32>
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{
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struct Frc_start : Bitfield<3, 1> { };
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};
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/**
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* Local timer 0 expired status
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*/
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struct L0_int_cstat : Register<0x330, 32, true>
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{
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struct Frcnt : Bitfield<1, 1> { };
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};
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/**
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* Local timer 0 interrupt enable
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*/
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struct L0_int_enb : Register<0x334, 32>
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{
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struct Frceie : Bitfield<1, 1> { };
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};
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/**
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* Local timer 0 write status
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*/
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struct L0_wstat : Register<0x340, 32, true>
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{
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struct Frcntb : Bitfield<2, 1> { };
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struct Tcon : Bitfield<3, 1> { };
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};
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/**
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* Write to reg that replies via ack bit and clear ack bit
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*/
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template <typename DEST, typename ACK>
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void _acked_write(typename DEST::Register_base::access_t const v)
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{
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typedef typename DEST::Register_base Dest;
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typedef typename ACK::Bitfield_base Ack;
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write<Dest>(v);
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while (!read<Ack>());
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write<Ack>(1);
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}
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float const _tics_per_ms;
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/**
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* Start and stop counting
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*/
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void _run(bool const run)
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{
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_acked_write<L0_tcon, L0_wstat::Tcon>
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(L0_tcon::Frc_start::bits(run));
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}
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public:
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/**
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* Constructor
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*/
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Timer(addr_t const base, unsigned const clk)
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: Mmio(base), _tics_per_ms((float)clk / (PRESCALER + 1) / (1 << DIV_MUX) / 1000)
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{
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Mct_cfg::access_t mct_cfg = 0;
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Mct_cfg::Prescaler::set(mct_cfg, PRESCALER);
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Mct_cfg::Div_mux::set(mct_cfg, DIV_MUX);
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write<Mct_cfg>(mct_cfg);
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write<L0_int_enb>(L0_int_enb::Frceie::bits(1));
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}
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/**
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* Start one-shot run with an IRQ delay of 'tics'
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*/
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inline void start_one_shot(unsigned const tics)
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{
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_run(0);
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_acked_write<L0_frcntb, L0_wstat::Frcntb>(tics);
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_run(1);
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}
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/**
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* Translate 'ms' milliseconds to a native timer value
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*/
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unsigned ms_to_tics(unsigned const ms)
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{
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return ms * _tics_per_ms;
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}
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/**
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* Clear interrupt output line
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*/
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void clear_interrupt() { write<L0_int_cstat::Frcnt>(1); }
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};
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}
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#endif /* _TIMER__EXYNOS_MCT_H_ */
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