07c8d1652e
To enable support of hardware virtualization for ARM on the Arndale board, the cpu needs to be prepared to enter the non-secure mode, as long as it does not already run in it. Therefore, especially the interrupt controller and some TrustZone specific system registers need to be prepared. Moreover, the exception vector for the hypervisor needs to be set up properly, before booting normally in the supervisor mode of the non-secure world. Ref #1405 |
||
|---|---|---|
| .. | ||
| arm | ||
| arm_gic | ||
| arm_v6 | ||
| arm_v7 | ||
| arndale | ||
| exynos5 | ||
| imx53 | ||
| panda | ||
| pbxa9 | ||
| rpi | ||
| vea9x4 | ||