diff --git a/repos/base-hw/src/bootstrap/spec/x86_64/crt0.s b/repos/base-hw/src/bootstrap/spec/x86_64/crt0.s
index 0e75f38c9..cf2a97512 100644
--- a/repos/base-hw/src/bootstrap/spec/x86_64/crt0.s
+++ b/repos/base-hw/src/bootstrap/spec/x86_64/crt0.s
@@ -157,6 +157,23 @@ __gdt:
 	movq (%rax), %rsp
 	addq %rcx, %rsp
 
+	/*
+	 * Enable paging and FPU:
+	 * PE, MP, NE, WP, PG
+	 */
+	mov $0x80010023, %rax
+	mov %rax, %cr0
+
+	/*
+	 * OSFXSR and OSXMMEXCPT for SSE FPU support
+	 */
+	mov %cr4, %rax
+	bts $9,   %rax
+	bts $10,  %rax
+	mov %rax, %cr4
+
+	fninit
+
 	/* kernel-initialization */
 	call init
 
diff --git a/repos/base-hw/src/core/spec/x86_64/fpu.cc b/repos/base-hw/src/core/spec/x86_64/fpu.cc
index bd2ee20d8..3e7d64db7 100644
--- a/repos/base-hw/src/core/spec/x86_64/fpu.cc
+++ b/repos/base-hw/src/core/spec/x86_64/fpu.cc
@@ -21,7 +21,12 @@ void Genode::Fpu::init()
 
 	Cpu::Cr0::Mp::set(cr0_value);
 	Cpu::Cr0::Em::clear(cr0_value);
-	Cpu::Cr0::Ts::set(cr0_value);
+
+	/*
+	 * Clear task switched so we do not gnerate FPU faults during kernel
+	 * initialisation, it will be turned on by Fpu::disable
+	 */
+	Cpu::Cr0::Ts::clear(cr0_value);
 	Cpu::Cr0::Ne::set(cr0_value);
 	Cpu::Cr0::write(cr0_value);