base-hw: Make memory_region_attr CPU-specific

This patch moves the implementation of the 'Arm::memory_region_attr'
function from the generic ARM code to the ARM v6/v7 specific code
to enable the customization of page-table bits depending on the
specific CPU core type. I.e., the ARM1176 apparently does not cope
well with setting the 'Tex::bits(2)' for MMIO mappings.
This commit is contained in:
Norman Feske 2013-04-10 14:18:56 +02:00
parent 71cd7b9d2e
commit d43d9900ab
3 changed files with 49 additions and 18 deletions

View File

@ -145,24 +145,7 @@ namespace Arm
*/
template <typename T>
static typename T::access_t
memory_region_attr(Page_flags::access_t const flags)
{
typedef typename T::Tex Tex;
typedef typename T::C C;
typedef typename T::B B;
/*
* FIXME: upgrade to write-back & write-allocate when !d & c
*/
if(Page_flags::D::get(flags))
return Tex::bits(2) | C::bits(0) | B::bits(0);
if(cache_support()) {
if(Page_flags::C::get(flags))
return Tex::bits(5) | C::bits(0) | B::bits(1);
return Tex::bits(6) | C::bits(1) | B::bits(0);
}
return Tex::bits(4) | C::bits(0) | B::bits(0);
}
memory_region_attr(Page_flags::access_t const flags);
/**
* Second level translation table

View File

@ -92,5 +92,28 @@ namespace Arm_v6
bool Arm::cache_support() { return 0; }
template <typename T>
static typename T::access_t
Arm::memory_region_attr(Arm::Page_flags::access_t const flags)
{
typedef typename T::Tex Tex;
typedef typename T::C C;
typedef typename T::B B;
/*
* FIXME: upgrade to write-back & write-allocate when !d & c
*/
if(Arm::Page_flags::D::get(flags))
return 0;
if(cache_support()) {
if(Arm::Page_flags::C::get(flags))
return Tex::bits(5) | C::bits(0) | B::bits(1);
return Tex::bits(6) | C::bits(1) | B::bits(0);
}
return Tex::bits(4) | C::bits(0) | B::bits(0);
}
#endif /* _TLB__ARM_V6_H_ */

View File

@ -112,6 +112,31 @@ namespace Arm_v7
}
template <typename T>
static typename T::access_t
Arm::memory_region_attr(Arm::Page_flags::access_t const flags)
{
typedef typename T::Tex Tex;
typedef typename T::C C;
typedef typename T::B B;
/*
* FIXME: upgrade to write-back & write-allocate when !d & c
*/
if(Arm::Page_flags::D::get(flags))
return Tex::bits(2) | C::bits(0) | B::bits(0);
if(cache_support()) {
if(Arm::Page_flags::C::get(flags))
return Tex::bits(5) | C::bits(0) | B::bits(1);
return Tex::bits(6) | C::bits(1) | B::bits(0);
}
return Tex::bits(4) | C::bits(0) | B::bits(0);
}
bool Arm::cache_support() { return 1; }