hw: enable nx bit handling for x86_64

Issue #1723

repos/base-hw/src/core/kernel/thread.h

@@ -64,6 +64,7 @@ class Kernel::Thread
 		bool               _paused = false;
 		bool               _cancel_next_await_signal = false;
 		bool const         _core = false;
+		bool               _fault_exec = false;
 
 		void _init();
 
@@ -309,6 +310,7 @@ class Kernel::Thread
 		addr_t fault_pd()     const { return _fault_pd; }
 		addr_t fault_addr()   const { return _fault_addr; }
 		addr_t fault_writes() const { return _fault_writes; }
+		bool   fault_exec()   const { return _fault_exec; }
 };
 
 

repos/base-hw/src/core/pager.cc

@@ -36,6 +36,8 @@ addr_t Ipc_pager::fault_addr() const { return _fault.addr; }
 
 bool Ipc_pager::write_fault() const { return _fault.writes; }
 
+bool Ipc_pager::exec_fault() const { return _fault.exec; }
+
 void Ipc_pager::set_reply_mapping(Mapping m) { _mapping = m; }
 
 

repos/base-hw/src/core/pager.h

@@ -68,7 +68,8 @@ struct Genode::Mapping : Hw::Mapping
 	        bool writeable,
 	        bool executable)
 	: Hw::Mapping(phys, virt, 1 << size_log2,
-	              { writeable ? Hw::RW : Hw::RO, Hw::EXEC, Hw::USER,
+	              { writeable ? Hw::RW : Hw::RO,
+	                executable ? Hw::EXEC : Hw::NO_EXEC, Hw::USER,
 	                Hw::NO_GLOBAL, io ? Hw::DEVICE : Hw::RAM, cacheable }) {}
 
 	void prepare_map_operation() const {}
@@ -87,6 +88,7 @@ class Genode::Ipc_pager
 			addr_t ip;
 			addr_t addr;
 			addr_t writes;
+			addr_t exec;
 			addr_t signal;
 		} _fault;
 
@@ -112,7 +114,7 @@ class Genode::Ipc_pager
 		/**
 		 * Executable permission fault
 		 */
-		bool exec_fault() const { return false; }
+		bool exec_fault() const; 
 
 		/**
 		 * Input mapping data as reply to current page fault

repos/base-hw/src/core/region_map_support.cc

@@ -53,6 +53,7 @@ void Pager_entrypoint::entry()
 		_fault.ip     = pt->kernel_object()->regs->ip;
 		_fault.addr   = pt->kernel_object()->fault_addr();
 		_fault.writes = pt->kernel_object()->fault_writes();
+		_fault.exec   = pt->kernel_object()->fault_exec();
 
 		/* try to resolve fault directly via local region managers */
 		if (po->pager(*this)) continue;

repos/base-hw/src/core/spec/x86_64/kernel/thread.cc

@@ -43,6 +43,7 @@ void Kernel::Thread::_mmu_exception()
 	_fault_pd     = (addr_t)_pd->platform_pd();
 	_fault_addr   = Cpu::Cr2::read();
 	_fault_writes = (regs->errcode & ERR_P) && (regs->errcode & ERR_W);
+	_fault_exec   = (regs->errcode & ERR_P) && (regs->errcode & ERR_I);
 
 	/*
 	 * Core should never raise a page-fault. If this happens, print out an

repos/base/run/rm_fault.run

@@ -6,6 +6,8 @@ if {[have_spec linux]} {
 # is not supported.
 #
 proc non_executable_supported { } {
+
+	if {[have_spec hw]   && [have_spec x86_64]} { return true }
 	if {[have_spec nova] && [have_spec x86_64]} { return true }
 	if {[have_spec foc]  && [have_spec x86_64]} { return true }
 	if {[have_spec foc]  && [have_spec arm]}    { return true }