Simple driver for the SP804 timer
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Martin Stein
Christian Helmuth
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/*
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* \brief Basic driver for the ARM SP804 timer
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* \author Martin stein
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* \date 2012-04-23
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*/
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/*
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* Copyright (C) 2012 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#ifndef _BASE__INCLUDE__DRIVERS__TIMER__SP804_H_
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#define _BASE__INCLUDE__DRIVERS__TIMER__SP804_H_
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/* Genode includes */
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#include <util/mmio.h>
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namespace Genode
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{
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/**
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* Basic driver for the ARM SP804 timer
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*
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* \detail Uses only timer module 0
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*/
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template <unsigned long CLK>
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class Sp804_base : public Mmio
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{
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enum {
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TICS_PER_MS = CLK / 1000,
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TICS_PER_US = TICS_PER_MS / 1000,
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AVOID_INVALID_TEMPLATE_ARGS = 1 / TICS_PER_US,
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};
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/**
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* Holds value that shall be loaded to the timer value register
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*/
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struct Load : Register<0x0, 32> { };
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/**
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* Raw interrupt status
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*/
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struct Ris : Register<0x10, 1> { };
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/**
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* Background load register
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*/
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struct Bgload : Register<0x18, 32> { };
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/**
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* Timer value register
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*/
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struct Value : Register<0x4, 32> { enum { MAX_VALUE = 0xffffffff }; };
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/**
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* Timer control register
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*/
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struct Control : Register<0x8, 8>
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{
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struct Oneshot : Bitfield<0,1> { };
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struct Size : Bitfield<1,1> { };
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struct Pre : Bitfield<2,2> { };
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struct Int_en : Bitfield<5,1> { };
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struct Mode : Bitfield<6,1> { };
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struct Timer_en : Bitfield<7,1> { };
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};
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/**
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* Clears the timer interrupt
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*/
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struct Int_clr : Register<0xc, 1> { };
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public:
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/**
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* Constructor, clears interrupt output
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*/
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Sp804_base(addr_t const mmio_base) : Mmio(mmio_base) {
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clear_interrupt(); }
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/**
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* Run the timer in order that it raises IRQ when
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* it reaches zero, then stop
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*
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* \param tics Native timer value used to assess the delay
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* of the timer interrupt as of this call
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*/
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void run_and_stop(unsigned long const tics)
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{
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/* Disable and configure timer for a one-shot */
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clear_interrupt();
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write<typename Control::Timer_en>(0);
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write<Control>(Control::Timer_en::bits(0) |
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Control::Mode::bits(1) |
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Control::Int_en::bits(1) |
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Control::Pre::bits(0) |
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Control::Size::bits(1) |
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Control::Oneshot::bits(1));
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/* Load value and enable timer */
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write<Load>(tics);
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write<typename Control::Timer_en>(1);
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}
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/**
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* Run the timer in order that it raises IRQ when
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* it reaches zero, then wrap and continue
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*
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* \param tics Native timer value used to assess the delay
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* of the timer interrupt as of this call
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*/
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void run_and_wrap(unsigned long const tics)
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{
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/* Configure the timer in order that it reloads on 0 */
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clear_interrupt();
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write<typename Control::Timer_en>(0);
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write<Control>(Control::Timer_en::bits(0) |
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Control::Mode::bits(1) |
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Control::Int_en::bits(1) |
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Control::Pre::bits(0) |
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Control::Size::bits(1) |
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Control::Oneshot::bits(0));
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/* Start timer with the inital value */
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write<Load>(tics);
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write<typename Control::Timer_en>(1);
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/* Ensure that the timer loads its max value instead of
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* the initial value when it reaches 0 in order that it
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* looks like it wraps */
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write<Bgload>(max_value());
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}
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/**
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* Current timer value
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*/
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unsigned long value() const { return read<Value>(); }
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/**
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* Get timer value and corresponding wrapped status of timer
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*/
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unsigned long value(bool & wrapped) const
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{
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typename Value::access_t v = read<Value>();
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wrapped = (bool)read<Ris>();
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if (!wrapped) return v;
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return read<Value>();
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}
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/**
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* Clear interrupt output line
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*/
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void clear_interrupt() { write<Int_clr>(1); }
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/**
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* Translate milliseconds to a native timer value
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*/
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static unsigned long ms_to_tics(unsigned long const ms) {
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return ms * TICS_PER_MS; }
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/**
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* Translate native timer value to microseconds
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*/
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static unsigned long tics_to_us(unsigned long const tics) {
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return tics / TICS_PER_US; }
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/**
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* Translate microseconds to a native timer value
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*/
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static unsigned long us_to_tics(unsigned long const tics) {
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return tics / TICS_PER_US; }
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/**
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* Translate native timer value to microseconds
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*/
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static unsigned long max_value() { return Value::MAX_VALUE; }
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};
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}
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#endif /* _BASE__INCLUDE__DRIVERS__TIMER__SP804_H_ */
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