timer: add dummy implementation for RISC-V
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repos/os/lib/mk/spec/riscv/hw_timer.mk
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repos/os/lib/mk/spec/riscv/hw_timer.mk
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INC_DIR += $(REP_DIR)/src/drivers/timer/spec/hw $(REP_DIR)/src/drivers/timer/spec/hw/spec/riscv
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include $(REP_DIR)/lib/mk/timer.inc
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/*
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* \brief Dummy platform timer
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* \author Sebastian Sumpf
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* \date 2016-02-10
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*/
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/*
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* Copyright (C) 2016 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#ifndef _HW__RISCV__PLATFORM_TIMER_BASE_H_
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#define _HW__RISCV__PLATFORM_TIMER_BASE_H_
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class Platform_timer_base
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{
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public:
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enum { IRQ };
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unsigned long tics_to_us(unsigned long const tics) const { return 0; }
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unsigned long us_to_tics(unsigned long const us) const { return 0; }
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unsigned long max_value() const { return 0; }
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unsigned long value(bool & wrapped) const { return 0; }
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void run_and_wrap(unsigned long value) { }
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};
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#endif /* _HW__RISCV__PLATFORM_TIMER_BASE_H_ */
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