News item about the RISC-V article

This commit is contained in:
Norman Feske 2016-03-22 10:20:15 +01:00 committed by Christian Helmuth
parent febb0cc13d
commit a1239c5e9d
1 changed files with 21 additions and 0 deletions

View File

@ -4,6 +4,27 @@
===========
How Genode came to RISC-V | 2016-03-22
######################################
| Our new article provides a look behind the scenes of porting Genode to
| the RISC-V hardware architecture.
The experience report
[http:/documentation/articles/riscv - How Genode came to RISC-V] complements
our recent
[http:/documentation/release-notes/16.02#New_support_for_the_RISC-V_CPU_architecture - announcement]
about Genode's added RISC-V support with in-depth technical information.
It briefly introduces the parts of the instruction set architecture (ISA) that
were most relevant for the porting work, presents various challenges we
encountered, and explains how we overcame them.
The article is written with two target audiences in mind: People interested in
practical experiences with RISC-V, and developers who aspire to port Genode
to new CPU architectures.
[http:/documentation/articles/riscv - Read the article...]
Genode OS Framework release 16.02 | 2016-02-26
##############################################