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binutils: update to version 2.28 

Fixes #2401
Issue #2372
This commit is contained in:
Christian Prochaska 2017-04-09 21:02:29 +02:00 committed by Christian Helmuth
parent 0e06042f81
commit 9f9271783e
8 changed files with 89 additions and 10627 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
repos/ports/ports/binutils.hash
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@ -1 +1 @@
3edd0cb727069ae91777496a581e7dc7628ec4a8
a85ea2e3fe2ebfba1fe415e5e1c3547491532fdc

4
repos/ports/ports/binutils.port
View File

@ -1,9 +1,9 @@
LICENSE := GPLv2
VERSION := 2.25
VERSION := 2.28
DOWNLOADS := binutils.archive
URL(binutils) := ftp://ftp.fu-berlin.de/gnu/binutils/binutils-$(VERSION).tar.bz2
SHA(binutils) := b46cc90ebaba7ffcf6c6d996d60738881b14e50d
SHA(binutils) := f8b033731f6baa437d429c60e2623570f1ef9d6b
SIG(binutils) := ${URL(binutils)}.sig
KEY(binutils) := GNU
DIR(binutils) := src/noux-pkg/binutils

21
repos/ports/src/noux-pkg/binutils/patches/arm.patch Normal file
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@ -0,0 +1,21 @@
Make the 'R_ARM_TARGET2' relocation type suitable for dynamic linking
(needed for linking stdcxx.lib.so).
From: Christian Prochaska <christian.prochaska@genode-labs.com>
ld/emultempl/armelf.em | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/ld/emultempl/armelf.em b/ld/emultempl/armelf.em
index 8a57727..98a668d 100644
--- a/ld/emultempl/armelf.em
+++ b/ld/emultempl/armelf.em
@@ -22,7 +22,7 @@
# This file is sourced from elf32.em, and defines extra arm-elf
# specific routines.
#
-test -z "$TARGET2_TYPE" && TARGET2_TYPE="rel"
+test -z "$TARGET2_TYPE" && TARGET2_TYPE="got-rel"
fragment <<EOF
#include "ldctor.h"

57
repos/ports/src/noux-pkg/binutils/patches/dynamic_list.patch Normal file
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@ -0,0 +1,57 @@
From 73ec947d59c511411377ad51ef792a5fcdd3f0cc Mon Sep 17 00:00:00 2001
From: Alan Modra <amodra@gmail.com>
Date: Tue, 2 May 2017 21:56:43 +0930
Subject: [PATCH] PR 21384, --dynamic-list regression with f02cb058
The commit to "Always descend into output section statements in
lang_do_assignments" meant that linker script symbols were not
bfd_link_hash_new when ld called bfd_elf_record_link_assignment.
This patch corrects that problem by testing h->non_elf instead.
PR 21384
* elflink.c (bfd_elf_link_mark_dynamic_symbol): Test h->non_elf
rather than h->root.type == bfd_link_hash_new.
(bfd_elf_record_link_assignment): Similarly, call
bfd_elf_link_mark_dynamic_symbol when h->non_elf.
---
bfd/ChangeLog | 8 ++++++++
bfd/elflink.c | 12 +++++++++---
2 files changed, 17 insertions(+), 3 deletions(-)
diff --git a/bfd/elflink.c b/bfd/elflink.c
index 4af4b1c..9acc069 100644
--- a/bfd/elflink.c
+++ b/bfd/elflink.c
@@ -580,7 +580,7 @@ bfd_elf_link_mark_dynamic_symbol (struct bfd_link_info *info,
&& (ELF_ST_TYPE (sym->st_info) == STT_OBJECT
|| ELF_ST_TYPE (sym->st_info) == STT_COMMON))))
|| (d != NULL
- && h->root.type == bfd_link_hash_new
+ && h->non_elf
&& (*d->match) (&d->head, NULL, h->root.root.string)))
h->dynamic = 1;
}
@@ -623,6 +623,14 @@ bfd_elf_record_link_assignment (bfd *output_bfd,
}
}
+ /* Symbols defined in a linker script but not referenced anywhere
+ else will have non_elf set. */
+ if (h->non_elf)
+ {
+ bfd_elf_link_mark_dynamic_symbol (info, h, NULL);
+ h->non_elf = 0;
+ }
+
switch (h->root.type)
{
case bfd_link_hash_defined:
@@ -639,8 +647,6 @@ bfd_elf_record_link_assignment (bfd *output_bfd,
bfd_link_repair_undef_list (&htab->root);
break;
case bfd_link_hash_new:
- bfd_elf_link_mark_dynamic_symbol (info, h, NULL);
- h->non_elf = 0;
break;
case bfd_link_hash_indirect:
/* We had a versioned symbol in a dynamic library. We make the

633
repos/ports/src/noux-pkg/binutils/patches/riscv.patch
View File

@ -1,633 +0,0 @@
diff --git a/bfd/Makefile.am b/bfd/Makefile.am
index 6f64f06..eb01c09 100644
--- a/bfd/Makefile.am
+++ b/bfd/Makefile.am
@@ -931,6 +931,18 @@ elf64-ia64.c : elfnn-ia64.c
sed -e s/NN/64/g < $(srcdir)/elfnn-ia64.c > elf64-ia64.new
mv -f elf64-ia64.new elf64-ia64.c
+elf32-riscv.c : elfnn-riscv.c
+ rm -f elf32-riscv.c
+ echo "#line 1 \"$(srcdir)/elfnn-riscv.c\"" > elf32-riscv.new
+ sed -e s/NN/32/g < $(srcdir)/elfnn-riscv.c >> elf32-riscv.new
+ mv -f elf32-riscv.new elf32-riscv.c
+
+elf64-riscv.c : elfnn-riscv.c
+ rm -f elf64-riscv.c
+ echo "#line 1 \"$(srcdir)/elfnn-riscv.c\"" > elf64-riscv.new
+ sed -e s/NN/64/g < $(srcdir)/elfnn-riscv.c >> elf64-riscv.new
+ mv -f elf64-riscv.new elf64-riscv.c
+
peigen.c : peXXigen.c
rm -f peigen.c
sed -e s/XX/pe/g < $(srcdir)/peXXigen.c > peigen.new
diff --git a/bfd/Makefile.in b/bfd/Makefile.in
index 2c385d5..abc26f7 100644
--- a/bfd/Makefile.in
+++ b/bfd/Makefile.in
@@ -442,6 +442,7 @@ ALL_MACHINES = \
cpu-pj.lo \
cpu-plugin.lo \
cpu-powerpc.lo \
+ cpu-riscv.lo \
cpu-rs6000.lo \
cpu-rl78.lo \
cpu-rx.lo \
@@ -526,6 +527,7 @@ ALL_MACHINES_CFILES = \
cpu-pj.c \
cpu-plugin.c \
cpu-powerpc.c \
+ cpu-riscv.c \
cpu-rs6000.c \
cpu-rl78.c \
cpu-rx.c \
@@ -2009,6 +2011,18 @@ elf64-ia64.c : elfnn-ia64.c
sed -e s/NN/64/g < $(srcdir)/elfnn-ia64.c > elf64-ia64.new
mv -f elf64-ia64.new elf64-ia64.c
+elf32-riscv.c : elfnn-riscv.c
+ rm -f elf32-riscv.c
+ echo "#line 1 \"$(srcdir)/elfnn-riscv.c\"" > elf32-riscv.new
+ sed -e s/NN/32/g < $(srcdir)/elfnn-riscv.c >> elf32-riscv.new
+ mv -f elf32-riscv.new elf32-riscv.c
+
+elf64-riscv.c : elfnn-riscv.c
+ rm -f elf64-riscv.c
+ echo "#line 1 \"$(srcdir)/elfnn-riscv.c\"" > elf64-riscv.new
+ sed -e s/NN/64/g < $(srcdir)/elfnn-riscv.c >> elf64-riscv.new
+ mv -f elf64-riscv.new elf64-riscv.c
+
peigen.c : peXXigen.c
rm -f peigen.c
sed -e s/XX/pe/g < $(srcdir)/peXXigen.c > peigen.new
diff --git a/bfd/archures.c b/bfd/archures.c
index c9fd6c8..8cbc157 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -597,6 +597,7 @@ extern const bfd_arch_info_type bfd_pj_arch;
extern const bfd_arch_info_type bfd_plugin_arch;
extern const bfd_arch_info_type bfd_powerpc_archs[];
#define bfd_powerpc_arch bfd_powerpc_archs[0]
+extern const bfd_arch_info_type bfd_riscv_arch;
extern const bfd_arch_info_type bfd_rs6000_arch;
extern const bfd_arch_info_type bfd_rl78_arch;
extern const bfd_arch_info_type bfd_rx_arch;
@@ -683,6 +684,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
&bfd_or1k_arch,
&bfd_pdp11_arch,
&bfd_powerpc_arch,
+ &bfd_riscv_arch,
&bfd_rs6000_arch,
&bfd_rl78_arch,
&bfd_rx_arch,
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index c7a2bb5..9d79d14 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -2043,6 +2043,9 @@ enum bfd_architecture
#define bfd_mach_ppc_e6500 5007
#define bfd_mach_ppc_titan 83
#define bfd_mach_ppc_vle 84
+ bfd_arch_riscv, /* RISC-V */
+#define bfd_mach_riscv32 132
+#define bfd_mach_riscv64 164
bfd_arch_rs6000, /* IBM RS/6000 */
#define bfd_mach_rs6k 6000
#define bfd_mach_rs6k_rs1 6001
@@ -5531,6 +5534,43 @@ relative offset from _GLOBAL_OFFSET_TABLE_ */
value in a word. The relocation is relative offset from */
BFD_RELOC_MICROBLAZE_32_GOTOFF,
+/* RISC-V relocations. */
+ BFD_RELOC_RISCV_HI20,
+ BFD_RELOC_RISCV_PCREL_HI20,
+ BFD_RELOC_RISCV_PCREL_LO12_I,
+ BFD_RELOC_RISCV_PCREL_LO12_S,
+ BFD_RELOC_RISCV_LO12_I,
+ BFD_RELOC_RISCV_LO12_S,
+ BFD_RELOC_RISCV_GPREL12_I,
+ BFD_RELOC_RISCV_GPREL12_S,
+ BFD_RELOC_RISCV_TPREL_HI20,
+ BFD_RELOC_RISCV_TPREL_LO12_I,
+ BFD_RELOC_RISCV_TPREL_LO12_S,
+ BFD_RELOC_RISCV_TPREL_ADD,
+ BFD_RELOC_RISCV_CALL,
+ BFD_RELOC_RISCV_CALL_PLT,
+ BFD_RELOC_RISCV_ADD8,
+ BFD_RELOC_RISCV_ADD16,
+ BFD_RELOC_RISCV_ADD32,
+ BFD_RELOC_RISCV_ADD64,
+ BFD_RELOC_RISCV_SUB8,
+ BFD_RELOC_RISCV_SUB16,
+ BFD_RELOC_RISCV_SUB32,
+ BFD_RELOC_RISCV_SUB64,
+ BFD_RELOC_RISCV_GOT_HI20,
+ BFD_RELOC_RISCV_TLS_GOT_HI20,
+ BFD_RELOC_RISCV_TLS_GD_HI20,
+ BFD_RELOC_RISCV_JMP,
+ BFD_RELOC_RISCV_TLS_DTPMOD32,
+ BFD_RELOC_RISCV_TLS_DTPREL32,
+ BFD_RELOC_RISCV_TLS_DTPMOD64,
+ BFD_RELOC_RISCV_TLS_DTPREL64,
+ BFD_RELOC_RISCV_TLS_TPREL32,
+ BFD_RELOC_RISCV_TLS_TPREL64,
+ BFD_RELOC_RISCV_ALIGN,
+ BFD_RELOC_RISCV_RVC_BRANCH,
+ BFD_RELOC_RISCV_RVC_JUMP,
+
/* This is used to tell the dynamic linker to copy the value out of
the dynamic object into the runtime process image. */
BFD_RELOC_MICROBLAZE_COPY,
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 7bcb92a..6f4b053 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -119,6 +119,7 @@ or1k*|or1knd*) targ_archs=bfd_or1k_arch ;;
pdp11*) targ_archs=bfd_pdp11_arch ;;
pj*) targ_archs="bfd_pj_arch bfd_i386_arch";;
powerpc*) targ_archs="bfd_rs6000_arch bfd_powerpc_arch" ;;
+riscv*) targ_archs=bfd_riscv_arch ;;
rs6000) targ_archs="bfd_rs6000_arch bfd_powerpc_arch" ;;
s390*) targ_archs=bfd_s390_arch ;;
sh*) targ_archs=bfd_sh_arch ;;
@@ -1319,6 +1320,14 @@ case "${targ}" in
targ_defvec=rl78_elf32_vec
;;
+#ifdef BFD64
+ riscv*-*-*)
+ targ_defvec=riscv_elf64_vec
+ targ_selvecs="riscv_elf32_vec riscv_elf64_vec"
+ want64=true
+ ;;
+#endif
+
rx-*-elf)
targ_defvec=rx_elf32_le_vec
targ_selvecs="rx_elf32_be_vec rx_elf32_le_vec rx_elf32_be_ns_vec"
diff --git a/bfd/configure b/bfd/configure
index 7016194..aad4432 100755
--- a/bfd/configure
+++ b/bfd/configure
@@ -15506,6 +15506,8 @@ do
powerpc_pei_vec) tb="$tb pei-ppc.lo peigen.lo cofflink.lo" ;;
powerpc_pei_le_vec) tb="$tb pei-ppc.lo peigen.lo cofflink.lo" ;;
powerpc_xcoff_vec) tb="$tb coff-rs6000.lo xcofflink.lo" ;;
+ riscv_elf32_vec) tb="$tb elf32-riscv.lo elfxx-riscv.lo elf32.lo $elf" ;;
+ riscv_elf64_vec) tb="$tb elf64-riscv.lo elf64.lo elfxx-riscv.lo elf32.lo $elf"; target_size=64 ;;
rl78_elf32_vec) tb="$tb elf32-rl78.lo elf32.lo $elf" ;;
rs6000_xcoff64_vec) tb="$tb coff64-rs6000.lo xcofflink.lo aix5ppc-core.lo"; target_size=64 ;;
rs6000_xcoff64_aix_vec) tb="$tb coff64-rs6000.lo xcofflink.lo aix5ppc-core.lo"; target_size=64 ;;
diff --git a/bfd/configure.ac b/bfd/configure.ac
index ba98e39..93ad0d0 100644
--- a/bfd/configure.ac
+++ b/bfd/configure.ac
@@ -907,6 +907,8 @@ do
powerpc_pei_vec) tb="$tb pei-ppc.lo peigen.lo cofflink.lo" ;;
powerpc_pei_le_vec) tb="$tb pei-ppc.lo peigen.lo cofflink.lo" ;;
powerpc_xcoff_vec) tb="$tb coff-rs6000.lo xcofflink.lo" ;;
+ riscv_elf32_vec) tb="$tb elf32-riscv.lo elfxx-riscv.lo elf32.lo $elf" ;;
+ riscv_elf64_vec) tb="$tb elf64-riscv.lo elf64.lo elfxx-riscv.lo elf32.lo $elf"; target_size=64 ;;
rl78_elf32_vec) tb="$tb elf32-rl78.lo elf32.lo $elf" ;;
rs6000_xcoff64_vec) tb="$tb coff64-rs6000.lo xcofflink.lo aix5ppc-core.lo"; target_size=64 ;;
rs6000_xcoff64_aix_vec) tb="$tb coff64-rs6000.lo xcofflink.lo aix5ppc-core.lo"; target_size=64 ;;
diff --git a/bfd/elf-bfd.h b/bfd/elf-bfd.h
index 72e7a66..dc488af 100644
--- a/bfd/elf-bfd.h
+++ b/bfd/elf-bfd.h
@@ -433,6 +433,7 @@ enum elf_target_id
XGATE_ELF_DATA,
TILEGX_ELF_DATA,
TILEPRO_ELF_DATA,
+ RISCV_ELF_DATA,
GENERIC_ELF_DATA
};
diff --git a/bfd/targets.c b/bfd/targets.c
index 8323e92..a28c0cf 100644
--- a/bfd/targets.c
+++ b/bfd/targets.c
@@ -784,6 +784,8 @@ extern const bfd_target powerpc_pe_le_vec;
extern const bfd_target powerpc_pei_vec;
extern const bfd_target powerpc_pei_le_vec;
extern const bfd_target powerpc_xcoff_vec;
+extern const bfd_target riscv_elf32_vec;
+extern const bfd_target riscv_elf64_vec;
extern const bfd_target rl78_elf32_vec;
extern const bfd_target rs6000_xcoff64_vec;
extern const bfd_target rs6000_xcoff64_aix_vec;
diff --git a/binutils/readelf.c b/binutils/readelf.c
index 0c00b2f..e3d7e5c 100644
--- a/binutils/readelf.c
+++ b/binutils/readelf.c
@@ -125,6 +125,7 @@
#include "elf/metag.h"
#include "elf/microblaze.h"
#include "elf/mips.h"
+#include "elf/riscv.h"
#include "elf/mmix.h"
#include "elf/mn10200.h"
#include "elf/mn10300.h"
@@ -720,6 +721,7 @@ guess_is_rela (unsigned int e_machine)
case EM_OR1K:
case EM_PPC64:
case EM_PPC:
+ case EM_RISCV:
case EM_RL78:
case EM_RX:
case EM_S390:
@@ -1252,6 +1254,10 @@ dump_relocations (FILE * file,
rtype = elf_mips_reloc_type (type);
break;
+ case EM_RISCV:
+ rtype = elf_riscv_reloc_type (type);
+ break;
+
case EM_ALPHA:
rtype = elf_alpha_reloc_type (type);
break;
@@ -2164,6 +2170,7 @@ get_machine_name (unsigned e_machine)
case EM_CR16:
case EM_MICROBLAZE:
case EM_MICROBLAZE_OLD: return "Xilinx MicroBlaze";
+ case EM_RISCV: return "RISC-V";
case EM_RL78: return "Renesas RL78";
case EM_RX: return "Renesas RX";
case EM_METAG: return "Imagination Technologies Meta processor architecture";
@@ -2951,6 +2958,16 @@ get_machine_flags (unsigned e_flags, unsigned e_machine)
decode_NDS32_machine_flags (e_flags, buf, sizeof buf);
break;
+ case EM_RISCV:
+ if (e_flags & EF_RISCV_RVC)
+ strcat (buf, ", RVC");
+
+ if (!EF_GET_RISCV_EXT (e_flags))
+ break;
+ strcat (buf, ", ");
+ strcat (buf, riscv_elf_flag_to_name (EF_GET_RISCV_EXT (e_flags)));
+ break;
+
case EM_SH:
switch ((e_flags & EF_SH_MACH_MASK))
{
@@ -10789,6 +10806,8 @@ is_32bit_abs_reloc (unsigned int reloc_type)
return reloc_type == 1; /* R_PPC64_ADDR32. */
case EM_PPC:
return reloc_type == 1; /* R_PPC_ADDR32. */
+ case EM_RISCV:
+ return reloc_type == 1; /* R_RISCV_32. */
case EM_RL78:
return reloc_type == 1; /* R_RL78_DIR32. */
case EM_RX:
@@ -10924,6 +10943,8 @@ is_64bit_abs_reloc (unsigned int reloc_type)
return reloc_type == 80; /* R_PARISC_DIR64. */
case EM_PPC64:
return reloc_type == 38; /* R_PPC64_ADDR64. */
+ case EM_RISCV:
+ return reloc_type == 2; /* R_RISCV_64. */
case EM_SPARC32PLUS:
case EM_SPARCV9:
case EM_SPARC:
@@ -11072,6 +11093,7 @@ is_none_reloc (unsigned int reloc_type)
case EM_ADAPTEVA_EPIPHANY:
case EM_PPC: /* R_PPC_NONE. */
case EM_PPC64: /* R_PPC64_NONE. */
+ case EM_RISCV: /* R_RISCV_NONE. */
case EM_ARM: /* R_ARM_NONE. */
case EM_IA_64: /* R_IA64_NONE. */
case EM_SH: /* R_SH_NONE. */
diff --git a/config.sub b/config.sub
index 88a0cb4..2d4be2f 100755
--- a/config.sub
+++ b/config.sub
@@ -335,6 +335,9 @@ case $basic_machine in
ms1)
basic_machine=mt-unknown
;;
+ riscv)
+ basic_machine=riscv-ucb
+ ;;
strongarm | thumb | xscale)
basic_machine=arm-unknown
diff --git a/gas/Makefile.am b/gas/Makefile.am
index 55c86b2..03684bd 100644
--- a/gas/Makefile.am
+++ b/gas/Makefile.am
@@ -171,6 +171,7 @@ TARGET_CPU_CFILES = \
config/tc-pdp11.c \
config/tc-pj.c \
config/tc-ppc.c \
+ config/tc-riscv.c \
config/tc-rl78.c \
config/tc-rx.c \
config/tc-s390.c \
@@ -242,6 +243,7 @@ TARGET_CPU_HFILES = \
config/tc-pdp11.h \
config/tc-pj.h \
config/tc-ppc.h \
+ config/tc-riscv.h \
config/tc-rl78.h \
config/tc-rx.h \
config/tc-s390.h \
diff --git a/gas/Makefile.in b/gas/Makefile.in
index 5dc250f..f53808b 100644
--- a/gas/Makefile.in
+++ b/gas/Makefile.in
@@ -440,6 +440,7 @@ TARGET_CPU_CFILES = \
config/tc-pdp11.c \
config/tc-pj.c \
config/tc-ppc.c \
+ config/tc-riscv.c \
config/tc-rl78.c \
config/tc-rx.c \
config/tc-s390.c \
@@ -511,6 +512,7 @@ TARGET_CPU_HFILES = \
config/tc-pdp11.h \
config/tc-pj.h \
config/tc-ppc.h \
+ config/tc-riscv.h \
config/tc-rl78.h \
config/tc-rx.h \
config/tc-s390.h \
@@ -866,6 +868,7 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-pdp11.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-pj.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-ppc.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-riscv.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-rl78.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-rx.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-s390.Po@am__quote@
@@ -1571,6 +1574,20 @@ tc-ppc.obj: config/tc-ppc.c
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-ppc.obj `if test -f 'config/tc-ppc.c'; then $(CYGPATH_W) 'config/tc-ppc.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-ppc.c'; fi`
+tc-riscv.o: config/tc-riscv.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-riscv.o -MD -MP -MF $(DEPDIR)/tc-riscv.Tpo -c -o tc-riscv.o `test -f 'config/tc-riscv.c' || echo '$(srcdir)/'`config/tc-riscv.c
+@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-riscv.Tpo $(DEPDIR)/tc-riscv.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='config/tc-riscv.c' object='tc-riscv.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-riscv.o `test -f 'config/tc-riscv.c' || echo '$(srcdir)/'`config/tc-riscv.c
+
+tc-riscv.obj: config/tc-riscv.c
+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-riscv.obj -MD -MP -MF $(DEPDIR)/tc-riscv.Tpo -c -o tc-riscv.obj `if test -f 'config/tc-riscv.c'; then $(CYGPATH_W) 'config/tc-riscv.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-riscv.c'; fi`
+@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-riscv.Tpo $(DEPDIR)/tc-riscv.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='config/tc-riscv.c' object='tc-riscv.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-riscv.obj `if test -f 'config/tc-riscv.c'; then $(CYGPATH_W) 'config/tc-riscv.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-riscv.c'; fi`
+
tc-rl78.o: config/tc-rl78.c
@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-rl78.o -MD -MP -MF $(DEPDIR)/tc-rl78.Tpo -c -o tc-rl78.o `test -f 'config/tc-rl78.c' || echo '$(srcdir)/'`config/tc-rl78.c
@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-rl78.Tpo $(DEPDIR)/tc-rl78.Po
diff --git a/gas/configure b/gas/configure
index 76b5f20..81e4ba1 100755
--- a/gas/configure
+++ b/gas/configure
@@ -12400,7 +12400,7 @@ $as_echo "#define NDS32_DEFAULT_AUDIO_EXT 1" >>confdefs.h
$as_echo "$enable_audio_ext" >&6; }
;;
- i386 | s390 | sparc)
+ i386 | riscv | s390 | sparc)
if test $this_target = $target ; then
cat >>confdefs.h <<_ACEOF
diff --git a/gas/configure.ac b/gas/configure.ac
index 371f7b3..357a21c 100644
--- a/gas/configure.ac
+++ b/gas/configure.ac
@@ -453,7 +453,7 @@ changequote([,])dnl
AC_MSG_RESULT($enable_audio_ext)
;;
- i386 | s390 | sparc)
+ i386 | riscv | s390 | sparc)
if test $this_target = $target ; then
AC_DEFINE_UNQUOTED(DEFAULT_ARCH, "${arch}", [Default architecture.])
fi
diff --git a/gas/configure.tgt b/gas/configure.tgt
index d07d445..6baa15f 100644
--- a/gas/configure.tgt
+++ b/gas/configure.tgt
@@ -86,6 +86,8 @@ case ${cpu} in
pj*) cpu_type=pj endian=big ;;
powerpc*le*) cpu_type=ppc endian=little ;;
powerpc*) cpu_type=ppc endian=big ;;
+ riscv32*) cpu_type=riscv endian=little arch=riscv32 ;;
+ riscv*) cpu_type=riscv endian=little arch=riscv64 ;;
rs6000*) cpu_type=ppc ;;
rl78*) cpu_type=rl78 ;;
rx) cpu_type=rx ;;
@@ -384,6 +386,8 @@ case ${generic_target} in
ppc-*-kaos*) fmt=elf ;;
ppc-*-lynxos*) fmt=elf em=lynx ;;
+ riscv*-*-*) fmt=elf endian=little em=linux ;;
+
s390-*-linux-*) fmt=elf em=linux ;;
s390-*-tpf*) fmt=elf ;;
@@ -478,7 +482,7 @@ case ${generic_target} in
esac
case ${cpu_type} in
- aarch64 | alpha | arm | i386 | ia64 | microblaze | mips | ns32k | or1k | or1knd | pdp11 | ppc | sparc | z80 | z8k)
+ aarch64 | alpha | arm | i386 | ia64 | microblaze | mips | ns32k | or1k | or1knd | pdp11 | ppc | riscv | sparc | z80 | z8k)
bfd_gas=yes
;;
esac
diff --git a/include/dis-asm.h b/include/dis-asm.h
index 1b653b5..d53b9b2 100644
--- a/include/dis-asm.h
+++ b/include/dis-asm.h
@@ -254,6 +254,7 @@ extern int print_insn_little_arm (bfd_vma, disassemble_info *);
extern int print_insn_little_mips (bfd_vma, disassemble_info *);
extern int print_insn_little_nios2 (bfd_vma, disassemble_info *);
extern int print_insn_little_powerpc (bfd_vma, disassemble_info *);
+extern int print_insn_riscv (bfd_vma, disassemble_info *);
extern int print_insn_little_score (bfd_vma, disassemble_info *);
extern int print_insn_lm32 (bfd_vma, disassemble_info *);
extern int print_insn_m32c (bfd_vma, disassemble_info *);
@@ -313,6 +314,7 @@ extern void print_aarch64_disassembler_options (FILE *);
extern void print_i386_disassembler_options (FILE *);
extern void print_mips_disassembler_options (FILE *);
extern void print_ppc_disassembler_options (FILE *);
+extern void print_riscv_disassembler_options (FILE *);
extern void print_arm_disassembler_options (FILE *);
extern void parse_arm_disassembler_option (char *);
extern void print_s390_disassembler_options (FILE *);
diff --git a/include/elf/common.h b/include/elf/common.h
index e8ae3ac..ad24500 100644
--- a/include/elf/common.h
+++ b/include/elf/common.h
@@ -301,6 +301,7 @@
#define EM_INTEL207 207 /* Reserved by Intel */
#define EM_INTEL208 208 /* Reserved by Intel */
#define EM_INTEL209 209 /* Reserved by Intel */
+#define EM_RISCV 243 /* RISC-V */
/* If it is necessary to assign new unofficial EM_* values, please pick large
random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision
diff --git a/ld/Makefile.am b/ld/Makefile.am
index 9575f1f..04664a0 100644
--- a/ld/Makefile.am
+++ b/ld/Makefile.am
@@ -258,6 +258,7 @@ ALL_EMULATION_SOURCES = \
eelf32ppcsim.c \
eelf32ppcvxworks.c \
eelf32ppcwindiss.c \
+ eelf32lriscv.c \
eelf32rl78.c \
eelf32rx.c \
eelf32tilegx.c \
@@ -464,6 +465,7 @@ ALL_64_EMULATION_SOURCES = \
eelf64btsmip_fbsd.c \
eelf64hppa.c \
eelf64lppc.c \
+ eelf64lriscv.c \
eelf64ltsmip.c \
eelf64ltsmip_fbsd.c \
eelf64mmix.c \
@@ -1104,6 +1106,11 @@ eelf32lppcsim.c: $(srcdir)/emulparams/elf32lppcsim.sh \
ldemul-list.h \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+eelf32lriscv.c: $(srcdir)/emulparams/elf32lriscv.sh \
+ $(srcdir)/emulparams/elf32lriscv-defs.sh $(ELF_DEPS) \
+ $(srcdir)/emultempl/riscvelf.em $(srcdir)/scripttempl/elf.sc \
+ ${GEN_DEPENDS}
+
eelf32lsmip.c: $(srcdir)/emulparams/elf32lsmip.sh \
$(srcdir)/emulparams/elf32lmip.sh $(srcdir)/emulparams/elf32bmip.sh \
$(ELF_DEPS) $(srcdir)/emultempl/mipself.em $(srcdir)/scripttempl/elf.sc \
@@ -1861,6 +1868,12 @@ eelf64lppc.c: $(srcdir)/emulparams/elf64lppc.sh \
ldemul-list.h \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+eelf64lriscv.c: $(srcdir)/emulparams/elf64lriscv.sh \
+ $(srcdir)/emulparams/elf64lriscv-defs.sh \
+ $(srcdir)/emulparams/elf32lriscv-defs.sh $(ELF_DEPS) \
+ $(srcdir)/emultempl/riscvelf.em $(srcdir)/scripttempl/elf.sc \
+ ${GEN_DEPENDS}
+
eelf64ltsmip.c: $(srcdir)/emulparams/elf64ltsmip.sh \
$(srcdir)/emulparams/elf64btsmip.sh $(srcdir)/emulparams/elf64bmip-defs.sh \
$(srcdir)/emulparams/elf32bmipn32-defs.sh $(ELF_DEPS) \
diff --git a/ld/Makefile.in b/ld/Makefile.in
index 9f56ca1..4307710 100644
--- a/ld/Makefile.in
+++ b/ld/Makefile.in
@@ -546,6 +546,7 @@ ALL_EMULATION_SOURCES = \
eelf32lppclinux.c \
eelf32lppcnto.c \
eelf32lppcsim.c \
+ eelf32lriscv.c \
eelf32m32c.c \
eelf32mb_linux.c \
eelf32mbel_linux.c \
@@ -771,6 +772,7 @@ ALL_64_EMULATION_SOURCES = \
eelf64btsmip_fbsd.c \
eelf64hppa.c \
eelf64lppc.c \
+ eelf64lriscv.c \
eelf64ltsmip.c \
eelf64ltsmip_fbsd.c \
eelf64mmix.c \
@@ -1157,6 +1159,7 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lppclinux.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lppcnto.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lppcsim.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lriscv.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lr5900.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lr5900n32.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32lsmip.Po@am__quote@
@@ -1211,6 +1214,7 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64btsmip_fbsd.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64hppa.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lppc.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ltsmip.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ltsmip_fbsd.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64mmix.Po@am__quote@
@@ -2545,6 +2549,11 @@ eelf32lppcsim.c: $(srcdir)/emulparams/elf32lppcsim.sh \
ldemul-list.h \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+eelf32lriscv.c: $(srcdir)/emulparams/elf32lriscv.sh \
+ $(srcdir)/emulparams/elf32lriscv-defs.sh $(ELF_DEPS) \
+ $(srcdir)/emultempl/riscvelf.em $(srcdir)/scripttempl/elf.sc \
+ ${GEN_DEPENDS}
+
eelf32lsmip.c: $(srcdir)/emulparams/elf32lsmip.sh \
$(srcdir)/emulparams/elf32lmip.sh $(srcdir)/emulparams/elf32bmip.sh \
$(ELF_DEPS) $(srcdir)/emultempl/mipself.em $(srcdir)/scripttempl/elf.sc \
@@ -3302,6 +3311,12 @@ eelf64lppc.c: $(srcdir)/emulparams/elf64lppc.sh \
ldemul-list.h \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+eelf64lriscv.c: $(srcdir)/emulparams/elf64lriscv.sh \
+ $(srcdir)/emulparams/elf64lriscv-defs.sh \
+ $(srcdir)/emulparams/elf32lriscv-defs.sh $(ELF_DEPS) \
+ $(srcdir)/emultempl/riscvelf.em $(srcdir)/scripttempl/elf.sc \
+ ${GEN_DEPENDS}
+
eelf64ltsmip.c: $(srcdir)/emulparams/elf64ltsmip.sh \
$(srcdir)/emulparams/elf64btsmip.sh $(srcdir)/emulparams/elf64bmip-defs.sh \
$(srcdir)/emulparams/elf32bmipn32-defs.sh $(ELF_DEPS) \
diff --git a/ld/configure.tgt b/ld/configure.tgt
index 24e36d1..11353f3 100644
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -604,6 +604,12 @@ powerpc-*-aix*) targ_emul=aixppc ;;
powerpc-*-beos*) targ_emul=aixppc ;;
powerpc-*-windiss*) targ_emul=elf32ppcwindiss ;;
powerpc-*-lynxos*) targ_emul=ppclynx ;;
+riscv32*-*-*) targ_emul=elf32lriscv
+ targ_extra_emuls="elf64lriscv"
+ targ_extra_libpath=$targ_extra_emuls ;;
+riscv*-*-*) targ_emul=elf64lriscv
+ targ_extra_emuls="elf32lriscv"
+ targ_extra_libpath=$targ_extra_emuls ;;
rs6000-*-aix[5-9]*) targ_emul=aix5rs6 ;;
rs6000-*-aix*) targ_emul=aixrs6
;;
diff --git a/opcodes/configure b/opcodes/configure
index 1361ef6..f8fca0c 100755
--- a/opcodes/configure
+++ b/opcodes/configure
@@ -12590,6 +12590,7 @@ if test x${all_targets} = xfalse ; then
bfd_powerpc_arch) ta="$ta ppc-dis.lo ppc-opc.lo" ;;
bfd_powerpc_64_arch) ta="$ta ppc-dis.lo ppc-opc.lo" ;;
bfd_pyramid_arch) ;;
+ bfd_riscv_arch) ta="$ta riscv-dis.lo riscv-opc.lo" ;;
bfd_romp_arch) ;;
bfd_rs6000_arch) ta="$ta ppc-dis.lo ppc-opc.lo" ;;
bfd_rl78_arch) ta="$ta rl78-dis.lo rl78-decode.lo";;
diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c
index 0a0814e..1e83180 100644
--- a/opcodes/disassemble.c
+++ b/opcodes/disassemble.c
@@ -373,6 +373,11 @@ disassembler (abfd)
disassemble = print_insn_little_powerpc;
break;
#endif
+#ifdef ARCH_riscv
+ case bfd_arch_riscv:
+ disassemble = print_insn_riscv;
+ break;
+#endif
#ifdef ARCH_rs6000
case bfd_arch_rs6000:
if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
@@ -545,6 +550,9 @@ disassembler_usage (stream)
#ifdef ARCH_powerpc
print_ppc_disassembler_options (stream);
#endif
+#ifdef ARCH_riscv
+ print_riscv_disassembler_options (stream);
+#endif
#ifdef ARCH_i386
print_i386_disassembler_options (stream);
#endif

9988
repos/ports/src/noux-pkg/binutils/patches/riscv_files.patch
View File

File diff suppressed because it is too large Load Diff

4
repos/ports/src/noux-pkg/binutils/patches/series
View File

@ -1,2 +1,2 @@
riscv_files.patch
riscv.patch
arm.patch
dynamic_list.patch

7
tool/tool_chain
View File

@ -48,7 +48,7 @@ GENODE_DIR ?= $(realpath $(dir $(firstword $(MAKEFILE_LIST)))/..)
#
GCC_VERSION = 4.9.2
BINUTILS_VERSION = 2.25
BINUTILS_VERSION = 2.28
INSTALL_LOCATION = /usr/local/genode-gcc
#
@ -193,6 +193,11 @@ BINUTILS_CONFIG += $(COMMON_CONFIG) --disable-werror
#
BINUTILS_CONFIG += CFLAGS=-DTE_LINUX
# Disable the generation of new relocation types introduced with binutils 2.26
# which are not recognized by older 'ld' versions. This is needed for hybrid
# Genode/Linux components on Ubuntu 14.04 with binutils 2.24.
BINUTILS_CONFIG_x86 += --disable-x86-relax-relocations
#
# Add platform-specific binutils configure arguments
#