timer epit: fix multi-wraps and bug in rate limit

Multi-wraps
-----------

Previously, on every new timeout, we programmed registers LR=timeout and
CMP=0. The counter than counted from LR down to 0, triggered the IRQ,
jumped back to LR, and counted down again. If one installed small
timeouts (< 1000 us), it was likely that the counter wrapped multiple
times before we were able to read it out. Initially, this was not a big
issue as the additional wraps were simply ignored and the amount of time
lost through this was not big. But when we want to do correct rate
limitation, multiple wraps cause an overflow in the additional
calculations, and this has a big effect on the resulting time value.

Thus, we now program the counter to start from ~0 and count down to 0.
We set CMP=~0-timeout so that the timer still triggers the IRQ at the right
time. The counter continues counting down after the IRQ has triggered until
we install a new timeout. We do not consider anymore that the counter wraps.
The maximum timeout is set to half the maximum counter value, so, we should
be able to install a new timeout before the counter wraps.

Rate limit for time updates
---------------------------

In the time span between two interrupts we have to remember how many ticks
we have already added to the time value. This is because at each call of
curr_time we can only see how many ticks have passed since the last call of
schedule_timeout and not since the last call of curr_time. But we want to
limit the rate of time updates in curr_time. With the member for ticks that
were already added since the last call to schedule_timeout we can then
calculate how many are yet to be added.

repos/os/src/drivers/timer/epit/time_source.cc

@@ -23,57 +23,33 @@ using namespace Genode;
 void Timer::Time_source::schedule_timeout(Genode::Microseconds  duration,
                                           Timeout_handler      &handler)
 {
-	/* on duration 0 trigger directly at function end and set max timeout */
-	unsigned long const us = duration.value ? duration.value
-	                                        : max_timeout().value;
-	unsigned long const ticks = (1ULL * us * TICKS_PER_MS) / 1000;
-
+	unsigned long const ticks = (1ULL * duration.value * TICKS_PER_MS) / 1000;
 	_handler = &handler;
 	_timer_irq.ack_irq();
-
-	/* wait until ongoing reset operations are finished */
-	while (read<Cr::Swr>()) ;
+	_cleared_ticks = 0;
 
 	/* disable timer */
 	write<Cr::En>(0);
 
-	/* clear interrupt */
+	/* clear interrupt and install timeout */
 	write<Sr::Ocif>(1);
-
-	/* configure timer for a one-shot */
 	write<Cr>(Cr::prepare_one_shot());
-	write<Lr>(ticks);
-	write<Cmpr>(0);
+	write<Cmpr>(Cnt::MAX - ticks);
 
 	/* start timer */
 	write<Cr::En>(1);
-
-	/* trigger for a timeout 0 immediately the signal */
-	if (!duration.value) {
-		Signal_transmitter(_signal_handler).submit();
-	}
 }
 
 
 Duration Timer::Time_source::curr_time()
 {
-	/* read timer status */
-	unsigned long      diff_ticks = 0;
-	Lr::access_t const max_value  = read<Lr>();
-	Cnt::access_t      cnt        = read<Cnt>();
-	bool         const wrapped    = read<Sr::Ocif>();
-
-	/* determine how many ticks have passed */
-	if (_irq && wrapped) {
-		cnt         = read<Cnt>();
-		diff_ticks += max_value;
-	}
-	diff_ticks += max_value - cnt;
-	unsigned long const diff_us = timer_ticks_to_us(diff_ticks, TICKS_PER_MS);
+	unsigned long const uncleared_ticks = Cnt::MAX - read<Cnt>() - _cleared_ticks;
+	unsigned long const uncleared_us    = timer_ticks_to_us(uncleared_ticks, TICKS_PER_MS);
 
 	/* update time only on IRQs and if rate is under 1000 per second */
-	if (_irq || diff_us > 1000) {
-		_curr_time.add(Genode::Microseconds(diff_us));
+	if (_irq || uncleared_us > 1000) {
+		_curr_time.add(Genode::Microseconds(uncleared_us));
+		_cleared_ticks += uncleared_ticks;
 	}
 	return _curr_time;
 }

repos/os/src/drivers/timer/epit/time_source.h

@@ -39,7 +39,6 @@ class Timer::Time_source : public Genode::Attached_mmio,
 			struct En      : Bitfield<0, 1>  { };
 			struct En_mod  : Bitfield<1, 1>  { enum { RELOAD = 1 }; };
 			struct Oci_en  : Bitfield<2, 1>  { };
-			struct Rld     : Bitfield<3, 1>  { enum { RELOAD_FROM_LR = 1 }; };
 			struct Swr     : Bitfield<16, 1> { };
 			struct Clk_src : Bitfield<24, 2> { enum { HIGH_FREQ_REF_CLK = 2 }; };
 
@@ -48,20 +47,19 @@ class Timer::Time_source : public Genode::Attached_mmio,
 				access_t cr = 0;
 				En_mod::set(cr, En_mod::RELOAD);
 				Oci_en::set(cr, 1);
-				Rld::set(cr, Rld::RELOAD_FROM_LR);
 				Clk_src::set(cr, Clk_src::HIGH_FREQ_REF_CLK);
 				return cr;
 			}
 		};
 
 		struct Sr   : Register<0x4,  32> { struct Ocif : Bitfield<0, 1> { }; };
-		struct Lr   : Register<0x8,  32> { };
 		struct Cmpr : Register<0xc,  32> { };
-		struct Cnt  : Register<0x10, 32> { };
+		struct Cnt  : Register<0x10, 32> { enum { MAX = ~(access_t)0 }; };
 
 		Genode::Irq_connection     _timer_irq;
-		Genode::Duration           _curr_time   { Genode::Microseconds(0) };
-		Genode::Microseconds const _max_timeout { Genode::timer_ticks_to_us(~0U, TICKS_PER_MS) };
+		Genode::Duration           _curr_time     { Genode::Microseconds(0) };
+		Genode::Microseconds const _max_timeout   { Genode::timer_ticks_to_us(Cnt::MAX / 2, TICKS_PER_MS) };
+		unsigned long              _cleared_ticks { 0 };
 
 	public:
 

repos/os/src/drivers/timer/epit/wand_quad/timer.cc

@@ -29,4 +29,5 @@ Timer::Time_source::Time_source(Env &env)
 	_timer_irq(env, Wand_quad::EPIT_2_IRQ)
 {
 	_timer_irq.sigh(_signal_handler);
+	while (read<Cr::Swr>()) ;
 }