diff --git a/repos/base-hw/lib/mk/spec/arm_v6/core-hw-rpi.mk b/repos/base-hw/lib/mk/spec/arm_v6/core-hw-rpi.mk index 825a33115..41954540d 100644 --- a/repos/base-hw/lib/mk/spec/arm_v6/core-hw-rpi.mk +++ b/repos/base-hw/lib/mk/spec/arm_v6/core-hw-rpi.mk @@ -9,9 +9,9 @@ INC_DIR += $(REP_DIR)/src/core/spec/rpi # add C++ sources SRC_CC += platform_services.cc +SRC_CC += spec/arm/bcm2835_pic.cc SRC_CC += spec/arm/cpu.cc SRC_CC += spec/rpi/timer.cc -SRC_CC += spec/rpi/pic.cc # include less specific configuration include $(REP_DIR)/lib/mk/spec/arm_v6/core-hw.inc diff --git a/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-arndale.mk b/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-arndale.mk index 0b583d94b..b7a990ad6 100644 --- a/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-arndale.mk +++ b/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-arndale.mk @@ -1,7 +1,7 @@ INC_DIR += $(BASE_DIR)/../base-hw/src/bootstrap/spec/arndale SRC_CC += bootstrap/spec/arm/cortex_a15_cpu.cc -SRC_CC += bootstrap/spec/arndale/pic.cc +SRC_CC += bootstrap/spec/arm/gicv2.cc SRC_CC += bootstrap/spec/arndale/platform.cc SRC_CC += bootstrap/spec/arm/arm_v7_cpu.cc SRC_CC += hw/spec/32bit/memory_map.cc diff --git a/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-imx6q_sabrelite.mk b/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-imx6q_sabrelite.mk index 8915f6914..54fcbffd6 100644 --- a/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-imx6q_sabrelite.mk +++ b/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-imx6q_sabrelite.mk @@ -4,7 +4,7 @@ SRC_S += bootstrap/spec/arm/crt0.s SRC_CC += bootstrap/spec/arm/cpu.cc SRC_CC += bootstrap/spec/arm/cortex_a9_mmu.cc -SRC_CC += bootstrap/spec/arm/pic.cc +SRC_CC += bootstrap/spec/arm/gicv2.cc SRC_CC += bootstrap/spec/arm/imx6_platform.cc SRC_CC += bootstrap/spec/arm/arm_v7_cpu.cc SRC_CC += hw/spec/32bit/memory_map.cc diff --git a/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-imx7d_sabre.mk b/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-imx7d_sabre.mk index 85fe91397..912b5da22 100644 --- a/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-imx7d_sabre.mk +++ b/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-imx7d_sabre.mk @@ -1,7 +1,7 @@ INC_DIR += $(BASE_DIR)/../base-hw/src/bootstrap/spec/imx7d_sabre SRC_CC += bootstrap/spec/arm/cortex_a15_cpu.cc -SRC_CC += bootstrap/spec/arndale/pic.cc +SRC_CC += bootstrap/spec/arm/gicv2.cc SRC_CC += bootstrap/spec/imx7d_sabre/platform.cc SRC_CC += bootstrap/spec/arm/arm_v7_cpu.cc SRC_CC += hw/spec/32bit/memory_map.cc diff --git a/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-nit6_solox.mk b/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-nit6_solox.mk index 39a89bcc5..d354da898 100644 --- a/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-nit6_solox.mk +++ b/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-nit6_solox.mk @@ -4,7 +4,7 @@ SRC_S += bootstrap/spec/arm/crt0.s SRC_CC += bootstrap/spec/arm/cpu.cc SRC_CC += bootstrap/spec/arm/cortex_a9_mmu.cc -SRC_CC += bootstrap/spec/arm/pic.cc +SRC_CC += bootstrap/spec/arm/gicv2.cc SRC_CC += bootstrap/spec/arm/imx6_platform.cc SRC_CC += bootstrap/spec/arm/arm_v7_cpu.cc SRC_CC += hw/spec/32bit/memory_map.cc diff --git a/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-odroid_xu.mk b/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-odroid_xu.mk index a6177b72f..94af20afb 100644 --- a/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-odroid_xu.mk +++ b/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-odroid_xu.mk @@ -1,7 +1,7 @@ INC_DIR += $(BASE_DIR)/../base-hw/src/bootstrap/spec/odroid_xu SRC_CC += bootstrap/spec/arm/cortex_a15_cpu.cc -SRC_CC += bootstrap/spec/arm/pic.cc +SRC_CC += bootstrap/spec/arm/gicv2.cc SRC_CC += bootstrap/spec/odroid_xu/platform.cc SRC_CC += bootstrap/spec/arm/arm_v7_cpu.cc SRC_CC += hw/spec/32bit/memory_map.cc diff --git a/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-panda.mk b/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-panda.mk index fd1c40448..3d7800aae 100644 --- a/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-panda.mk +++ b/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-panda.mk @@ -3,7 +3,7 @@ NR_OF_CPUS = 2 INC_DIR += $(BASE_DIR)/../base-hw/src/bootstrap/spec/panda SRC_CC += bootstrap/spec/arm/cpu.cc SRC_CC += bootstrap/spec/arm/cortex_a9_mmu.cc -SRC_CC += bootstrap/spec/arm/pic.cc +SRC_CC += bootstrap/spec/arm/gicv2.cc SRC_CC += bootstrap/spec/panda/platform.cc SRC_CC += bootstrap/spec/arm/arm_v7_cpu.cc SRC_CC += hw/spec/32bit/memory_map.cc diff --git a/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-pbxa9.mk b/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-pbxa9.mk index 30e865e36..bd370347a 100644 --- a/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-pbxa9.mk +++ b/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-pbxa9.mk @@ -4,7 +4,7 @@ SRC_S += bootstrap/spec/arm/crt0.s SRC_CC += bootstrap/spec/arm/cpu.cc SRC_CC += bootstrap/spec/arm/cortex_a9_mmu.cc -SRC_CC += bootstrap/spec/arm/pic.cc +SRC_CC += bootstrap/spec/arm/gicv2.cc SRC_CC += bootstrap/spec/pbxa9/platform.cc SRC_CC += bootstrap/spec/arm/arm_v7_cpu.cc SRC_CC += hw/spec/32bit/memory_map.cc diff --git a/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-wand_quad.mk b/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-wand_quad.mk index a716e897f..ddff5cd6a 100644 --- a/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-wand_quad.mk +++ b/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-wand_quad.mk @@ -4,7 +4,7 @@ SRC_S += bootstrap/spec/arm/crt0.s SRC_CC += bootstrap/spec/arm/cpu.cc SRC_CC += bootstrap/spec/arm/cortex_a9_mmu.cc -SRC_CC += bootstrap/spec/arm/pic.cc +SRC_CC += bootstrap/spec/arm/gicv2.cc SRC_CC += bootstrap/spec/arm/imx6_platform.cc SRC_CC += bootstrap/spec/arm/arm_v7_cpu.cc SRC_CC += hw/spec/32bit/memory_map.cc diff --git a/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-zynq_qemu.mk b/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-zynq_qemu.mk index 93a74d759..eaeb6aef0 100644 --- a/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-zynq_qemu.mk +++ b/repos/base-hw/lib/mk/spec/arm_v7/bootstrap-hw-zynq_qemu.mk @@ -4,7 +4,7 @@ SRC_S += bootstrap/spec/arm/crt0.s SRC_CC += bootstrap/spec/arm/cpu.cc SRC_CC += bootstrap/spec/arm/cortex_a9_mmu.cc -SRC_CC += bootstrap/spec/arm/pic.cc +SRC_CC += bootstrap/spec/arm/gicv2.cc SRC_CC += bootstrap/spec/zynq/platform.cc SRC_CC += bootstrap/spec/arm/arm_v7_cpu.cc SRC_CC += hw/spec/32bit/memory_map.cc diff --git a/repos/base-hw/lib/mk/spec/arm_v7/core-hw-arndale.mk b/repos/base-hw/lib/mk/spec/arm_v7/core-hw-arndale.mk index 0ba68ffb7..2ef725f61 100644 --- a/repos/base-hw/lib/mk/spec/arm_v7/core-hw-arndale.mk +++ b/repos/base-hw/lib/mk/spec/arm_v7/core-hw-arndale.mk @@ -9,7 +9,7 @@ INC_DIR += $(REP_DIR)/src/core/spec/arndale INC_DIR += $(REP_DIR)/src/core/spec/arm_v7/virtualization # add C++ sources -SRC_CC += spec/arm_gic/pic.cc +SRC_CC += spec/arm/gicv2.cc SRC_CC += spec/arndale/platform_services.cc SRC_CC += kernel/vm_thread_on.cc SRC_CC += spec/arm_v7/virtualization/kernel/vm.cc diff --git a/repos/base-hw/lib/mk/spec/arm_v7/core-hw-imx53_qsb.inc b/repos/base-hw/lib/mk/spec/arm_v7/core-hw-imx53_qsb.inc index b0d8ac556..dd8856b5f 100644 --- a/repos/base-hw/lib/mk/spec/arm_v7/core-hw-imx53_qsb.inc +++ b/repos/base-hw/lib/mk/spec/arm_v7/core-hw-imx53_qsb.inc @@ -9,7 +9,7 @@ INC_DIR += $(REP_DIR)/src/core/spec/imx53_qsb INC_DIR += $(REP_DIR)/src/core/spec/imx53 -SRC_CC += spec/imx53/pic.cc +SRC_CC += spec/arm/imx_tzic.cc SRC_CC += spec/imx53/timer.cc # include less specific configuration diff --git a/repos/base-hw/lib/mk/spec/arm_v7/core-hw-imx7d_sabre.mk b/repos/base-hw/lib/mk/spec/arm_v7/core-hw-imx7d_sabre.mk index feeb6797b..6ad5cfd70 100644 --- a/repos/base-hw/lib/mk/spec/arm_v7/core-hw-imx7d_sabre.mk +++ b/repos/base-hw/lib/mk/spec/arm_v7/core-hw-imx7d_sabre.mk @@ -9,7 +9,7 @@ INC_DIR += $(REP_DIR)/src/core/spec/imx7d_sabre INC_DIR += $(REP_DIR)/src/core/spec/arm_v7/virtualization # add C++ sources -SRC_CC += spec/arm_gic/pic.cc +SRC_CC += spec/arm/gicv2.cc SRC_CC += spec/arndale/platform_services.cc SRC_CC += spec/imx7d_sabre/timer.cc SRC_CC += kernel/vm_thread_on.cc diff --git a/repos/base-hw/lib/mk/spec/arm_v7/core-hw-odroid_xu.mk b/repos/base-hw/lib/mk/spec/arm_v7/core-hw-odroid_xu.mk index 3cb7739e3..bcf42a146 100644 --- a/repos/base-hw/lib/mk/spec/arm_v7/core-hw-odroid_xu.mk +++ b/repos/base-hw/lib/mk/spec/arm_v7/core-hw-odroid_xu.mk @@ -8,7 +8,7 @@ INC_DIR += $(REP_DIR)/src/core/spec/odroid_xu # add C++ sources -SRC_CC += spec/arm_gic/pic.cc +SRC_CC += spec/arm/gicv2.cc SRC_CC += kernel/vm_thread_off.cc SRC_CC += platform_services.cc diff --git a/repos/base-hw/lib/mk/spec/arm_v7/core-hw-usb_armory.mk b/repos/base-hw/lib/mk/spec/arm_v7/core-hw-usb_armory.mk index d0aa4045e..4c6bbe55f 100644 --- a/repos/base-hw/lib/mk/spec/arm_v7/core-hw-usb_armory.mk +++ b/repos/base-hw/lib/mk/spec/arm_v7/core-hw-usb_armory.mk @@ -16,7 +16,7 @@ SRC_CC += kernel/vm_thread_on.cc SRC_CC += spec/arm_v7/trustzone/kernel/vm.cc SRC_CC += spec/arm_v7/vm_session_component.cc SRC_CC += spec/arm_v7/trustzone/vm_session_component.cc -SRC_CC += spec/imx53/pic.cc +SRC_CC += spec/arm/imx_tzic.cc SRC_CC += spec/imx53/timer.cc # add assembly sources diff --git a/repos/base-hw/lib/mk/spec/arm_v8/core-hw-rpi3.mk b/repos/base-hw/lib/mk/spec/arm_v8/core-hw-rpi3.mk index 4c75401c7..ab7a17e6f 100644 --- a/repos/base-hw/lib/mk/spec/arm_v8/core-hw-rpi3.mk +++ b/repos/base-hw/lib/mk/spec/arm_v8/core-hw-rpi3.mk @@ -10,7 +10,7 @@ SRC_CC += spec/arm_v8/cpu.cc SRC_CC += spec/arm_v8/kernel/thread.cc SRC_CC += spec/arm_v8/kernel/cpu.cc SRC_CC += spec/arm/platform_support.cc -SRC_CC += spec/rpi3/pic.cc +SRC_CC += spec/arm/bcm2837_pic.cc SRC_CC += spec/rpi3/timer.cc SRC_CC += spec/64bit/memory_map.cc diff --git a/repos/base-hw/lib/mk/spec/cortex_a15/core-hw.inc b/repos/base-hw/lib/mk/spec/cortex_a15/core-hw.inc index bf0787559..b58a86f57 100644 --- a/repos/base-hw/lib/mk/spec/cortex_a15/core-hw.inc +++ b/repos/base-hw/lib/mk/spec/cortex_a15/core-hw.inc @@ -6,7 +6,6 @@ # add include paths INC_DIR += $(BASE_DIR)/../base-hw/src/core/spec/cortex_a15 -INC_DIR += $(BASE_DIR)/../base-hw/src/core/spec/arm_gic # add C++ sources SRC_CC += spec/cortex_a15/cpu.cc diff --git a/repos/base-hw/lib/mk/spec/cortex_a9/core-hw.inc b/repos/base-hw/lib/mk/spec/cortex_a9/core-hw.inc index 2b7fdd731..59f1610e6 100644 --- a/repos/base-hw/lib/mk/spec/cortex_a9/core-hw.inc +++ b/repos/base-hw/lib/mk/spec/cortex_a9/core-hw.inc @@ -6,12 +6,11 @@ # add include paths INC_DIR += $(BASE_DIR)/../base-hw/src/core/spec/cortex_a9 -INC_DIR += $(BASE_DIR)/../base-hw/src/core/spec/arm_gic # add C++ sources SRC_CC += spec/cortex_a9/board.cc SRC_CC += spec/cortex_a9/timer.cc -SRC_CC += spec/arm_gic/pic.cc +SRC_CC += spec/arm/gicv2.cc SRC_CC += spec/arm/kernel/lock.cc SRC_CC += kernel/vm_thread_off.cc SRC_CC += kernel/cpu_mp.cc diff --git a/repos/base-hw/src/bootstrap/platform.h b/repos/base-hw/src/bootstrap/platform.h index 958f55626..88c662ae3 100644 --- a/repos/base-hw/src/bootstrap/platform.h +++ b/repos/base-hw/src/bootstrap/platform.h @@ -47,6 +47,7 @@ class Bootstrap::Platform Mmio_space const core_mmio; unsigned cpus { NR_OF_CPUS }; ::Board::Boot_info info { }; + ::Board::Pic pic { }; Board(); }; @@ -123,7 +124,6 @@ class Bootstrap::Platform Board board { }; Bootstrap::Cpu cpu { }; - Bootstrap::Pic pic { }; Ram_allocator ram_alloc { }; Memory_region const bootstrap_region; Genode::Constructible core_pd { }; diff --git a/repos/base-hw/src/bootstrap/spec/arm/cortex_a9_mmu.cc b/repos/base-hw/src/bootstrap/spec/arm/cortex_a9_mmu.cc index 47e9c9519..e2ab1026b 100644 --- a/repos/base-hw/src/bootstrap/spec/arm/cortex_a9_mmu.cc +++ b/repos/base-hw/src/bootstrap/spec/arm/cortex_a9_mmu.cc @@ -118,7 +118,7 @@ unsigned Bootstrap::Platform::enable_mmu() Actlr::disable_smp(); /* locally initialize interrupt controller */ - pic.init_cpu_local(); + board.pic.init_cpu_local(); Cpu::invalidate_data_cache(); data_cache_invalidated.inc(); diff --git a/repos/base-hw/src/bootstrap/spec/arndale/pic.cc b/repos/base-hw/src/bootstrap/spec/arm/gicv2.cc similarity index 59% rename from repos/base-hw/src/bootstrap/spec/arndale/pic.cc rename to repos/base-hw/src/bootstrap/spec/arm/gicv2.cc index 7eb3f88cf..7610e3e57 100644 --- a/repos/base-hw/src/bootstrap/spec/arndale/pic.cc +++ b/repos/base-hw/src/bootstrap/spec/arm/gicv2.cc @@ -5,25 +5,23 @@ */ /* - * Copyright (C) 2012-2017 Genode Labs GmbH + * Copyright (C) 2012-2019 Genode Labs GmbH * * This file is part of the Genode OS framework, which is distributed * under the terms of the GNU Affero General Public License version 3. */ -#include -#include -#include +#include -using Bootstrap::Platform; - -void Bootstrap::Pic::init_cpu_local() +void Board::Pic::init_cpu_local() { - _cpui.write(0); + if (Board::NON_SECURE) { + _cpui.write(0); - /* mark software-generated IRQs as being non-secure */ - for (unsigned i = 0; i < min_spi; i++) - _distr.write(1, i); + /* mark software-generated IRQs as being non-secure */ + for (unsigned i = 0; i < min_spi; i++) + _distr.write(1, i); + } /* disable the priority filter */ _cpui.write(_distr.min_priority()); @@ -33,14 +31,18 @@ void Bootstrap::Pic::init_cpu_local() /* enable device */ Cpu_interface::Ctlr::access_t v = 0; - Cpu_interface::Ctlr::Enable_grp0::set(v, 1); - Cpu_interface::Ctlr::Enable_grp1::set(v, 1); - Cpu_interface::Ctlr::Fiq_en::set(v, 1); + if (Board::NON_SECURE) { + Cpu_interface::Ctlr::Enable_grp0::set(v, 1); + Cpu_interface::Ctlr::Enable_grp1::set(v, 1); + Cpu_interface::Ctlr::Fiq_en::set(v, 1); + } else { + Cpu_interface::Ctlr::Enable::set(v, 1); + } _cpui.write(v); } -Hw::Pic::Pic() +Hw::Gicv2::Gicv2() : _distr(Board::Cpu_mmio::IRQ_CONTROLLER_DISTR_BASE), _cpui (Board::Cpu_mmio::IRQ_CONTROLLER_CPU_BASE), _last_iar(Cpu_interface::Iar::Irq_id::bits(spurious_id)), @@ -51,15 +53,21 @@ Hw::Pic::Pic() /* configure every shared peripheral interrupt */ for (unsigned i = min_spi; i <= _max_irq; i++) { - /* mark as non-secure */ - _distr.write(1, i); + if (Board::NON_SECURE) { + _distr.write(1, i); + } _distr.write(0, i); _distr.write(0, i); _distr.write(1, i); } + /* enable device */ Distributor::Ctlr::access_t v = 0; - Distributor::Ctlr::Enable_grp0::set(v, 1); - Distributor::Ctlr::Enable_grp1::set(v, 1); + if (Board::NON_SECURE) { + Distributor::Ctlr::Enable_grp0::set(v, 1); + Distributor::Ctlr::Enable_grp1::set(v, 1); + } else { + Distributor::Ctlr::Enable::set(v, 1); + } _distr.write(v); } diff --git a/repos/base-hw/src/bootstrap/spec/arm/pic.h b/repos/base-hw/src/bootstrap/spec/arm/gicv2.h similarity index 58% rename from repos/base-hw/src/bootstrap/spec/arm/pic.h rename to repos/base-hw/src/bootstrap/spec/arm/gicv2.h index 115f633c8..d9c19b692 100644 --- a/repos/base-hw/src/bootstrap/spec/arm/pic.h +++ b/repos/base-hw/src/bootstrap/spec/arm/gicv2.h @@ -11,16 +11,16 @@ * under the terms of the GNU Affero General Public License version 3. */ -#ifndef _SRC__BOOTSTRAP__SPEC__ARM__PIC_H_ -#define _SRC__BOOTSTRAP__SPEC__ARM__PIC_H_ +#ifndef _SRC__BOOTSTRAP__SPEC__ARM__GICV2_H_ +#define _SRC__BOOTSTRAP__SPEC__ARM__GICV2_H_ -#include +#include -namespace Bootstrap { struct Pic; } +namespace Board { struct Pic; } -struct Bootstrap::Pic : Hw::Pic +struct Board::Pic : Hw::Gicv2 { void init_cpu_local(); }; -#endif /* _SRC__BOOTSTRAP__SPEC__ARM__PIC_H_ */ +#endif /* _SRC__BOOTSTRAP__SPEC__ARM__GICV2_H_ */ diff --git a/repos/base-hw/src/bootstrap/spec/arm/pic.cc b/repos/base-hw/src/bootstrap/spec/arm/pic.cc deleted file mode 100644 index 80b83ea85..000000000 --- a/repos/base-hw/src/bootstrap/spec/arm/pic.cc +++ /dev/null @@ -1,49 +0,0 @@ -/* - * \brief Programmable interrupt controller for core - * \author Stefan Kalkowski - * \date 2012-10-24 - */ - -/* - * Copyright (C) 2012-2013 Genode Labs GmbH - * - * This file is part of the Genode OS framework, which is distributed - * under the terms of the GNU Affero General Public License version 3. - */ - -#include -#include - -using Bootstrap::Platform; - -void Bootstrap::Pic::init_cpu_local() -{ - /* disable the priority filter */ - _cpui.write(_distr.min_priority()); - - /* disable preemption of IRQ handling by other IRQs */ - _cpui.write(~0); - - /* enable device */ - _cpui.write(1); -} - - -Hw::Pic::Pic() -: _distr(Board::Cpu_mmio::IRQ_CONTROLLER_DISTR_BASE), - _cpui (Board::Cpu_mmio::IRQ_CONTROLLER_CPU_BASE), - _last_iar(Cpu_interface::Iar::Irq_id::bits(spurious_id)), - _max_irq(_distr.max_irq()) -{ - /* disable device */ - _distr.write(0); - - /* configure every shared peripheral interrupt */ - for (unsigned i = min_spi; i <= _max_irq; i++) { - _distr.write(0, i); - _distr.write(0, i); - _distr.write(1, i); - } - /* enable device */ - _distr.write(1); -} diff --git a/repos/base-hw/src/bootstrap/spec/arndale/board.h b/repos/base-hw/src/bootstrap/spec/arndale/board.h index 318babade..a8fdafcb4 100644 --- a/repos/base-hw/src/bootstrap/spec/arndale/board.h +++ b/repos/base-hw/src/bootstrap/spec/arndale/board.h @@ -17,8 +17,12 @@ #include #include #include -#include +#include -namespace Board { using namespace Hw::Arndale_board; } +namespace Board { + using namespace Hw::Arndale_board; + + static constexpr bool NON_SECURE = true; +} #endif /* _SRC__BOOTSTRAP__SPEC__ARNDALE__BOARD_H_ */ diff --git a/repos/base-hw/src/bootstrap/spec/arndale/platform.cc b/repos/base-hw/src/bootstrap/spec/arndale/platform.cc index ded01f036..7a86d1f8e 100644 --- a/repos/base-hw/src/bootstrap/spec/arndale/platform.cc +++ b/repos/base-hw/src/bootstrap/spec/arndale/platform.cc @@ -153,7 +153,7 @@ static inline void switch_to_supervisor_mode() unsigned Bootstrap::Platform::enable_mmu() { static volatile bool primary_cpu = true; - pic.init_cpu_local(); + board.pic.init_cpu_local(); prepare_nonsecure_world(); prepare_hypervisor((addr_t)core_pd->table_base); diff --git a/repos/base-hw/src/bootstrap/spec/imx53_qsb/board.h b/repos/base-hw/src/bootstrap/spec/imx53_qsb/board.h index dc60a225a..4633e6167 100644 --- a/repos/base-hw/src/bootstrap/spec/imx53_qsb/board.h +++ b/repos/base-hw/src/bootstrap/spec/imx53_qsb/board.h @@ -23,9 +23,9 @@ namespace Board { using namespace Hw::Imx53_qsb_board; + using Hw::Pic; + bool secure_irq(unsigned irq); } -namespace Bootstrap { using Hw::Pic; } - #endif /* _SRC__BOOTSTRAP__SPEC__IMX53_QSB__BOARD_H_ */ diff --git a/repos/base-hw/src/bootstrap/spec/imx6q_sabrelite/board.h b/repos/base-hw/src/bootstrap/spec/imx6q_sabrelite/board.h index a8c9acfaa..218438d94 100644 --- a/repos/base-hw/src/bootstrap/spec/imx6q_sabrelite/board.h +++ b/repos/base-hw/src/bootstrap/spec/imx6q_sabrelite/board.h @@ -18,13 +18,15 @@ #include #include #include -#include +#include namespace Board { using namespace Hw::Imx6q_sabrelite_board; struct L2_cache; + static constexpr bool NON_SECURE = false; + static volatile unsigned long initial_values[][2] { // (IOMUX Controller) { 0x20e0004, 0x48613005 }, diff --git a/repos/base-hw/src/bootstrap/spec/imx7d_sabre/board.h b/repos/base-hw/src/bootstrap/spec/imx7d_sabre/board.h index 2d1fa7a4e..ec1de436f 100644 --- a/repos/base-hw/src/bootstrap/spec/imx7d_sabre/board.h +++ b/repos/base-hw/src/bootstrap/spec/imx7d_sabre/board.h @@ -17,10 +17,12 @@ #include #include #include -#include +#include namespace Board { using namespace Hw::Imx7d_sabre_board; + + static constexpr bool NON_SECURE = true; } #endif /* _SRC__BOOTSTRAP__SPEC__IMX&_SABRELITE__BOARD_H_ */ diff --git a/repos/base-hw/src/bootstrap/spec/imx7d_sabre/platform.cc b/repos/base-hw/src/bootstrap/spec/imx7d_sabre/platform.cc index 706f0a745..bf84f0cf5 100644 --- a/repos/base-hw/src/bootstrap/spec/imx7d_sabre/platform.cc +++ b/repos/base-hw/src/bootstrap/spec/imx7d_sabre/platform.cc @@ -287,7 +287,7 @@ unsigned Bootstrap::Platform::enable_mmu() { static volatile bool primary_cpu = true; static unsigned long timer_freq = Cpu::Cntfrq::read(); - pic.init_cpu_local(); + board.pic.init_cpu_local(); prepare_nonsecure_world(timer_freq); prepare_hypervisor((addr_t)core_pd->table_base); diff --git a/repos/base-hw/src/bootstrap/spec/nit6_solox/board.h b/repos/base-hw/src/bootstrap/spec/nit6_solox/board.h index f3d84cce3..886078e90 100644 --- a/repos/base-hw/src/bootstrap/spec/nit6_solox/board.h +++ b/repos/base-hw/src/bootstrap/spec/nit6_solox/board.h @@ -18,13 +18,15 @@ #include #include #include -#include +#include namespace Board { using namespace Hw::Nit6_solox_board; struct L2_cache; + static constexpr bool NON_SECURE = false; + static volatile unsigned long initial_values[][2] { // (IOMUX Controller) { 0x20E006C, 0x0}, diff --git a/repos/base-hw/src/bootstrap/spec/odroid_xu/board.h b/repos/base-hw/src/bootstrap/spec/odroid_xu/board.h index 688d6a229..e6cd3ea7c 100644 --- a/repos/base-hw/src/bootstrap/spec/odroid_xu/board.h +++ b/repos/base-hw/src/bootstrap/spec/odroid_xu/board.h @@ -17,10 +17,11 @@ #include #include #include -#include +#include namespace Board { using namespace Hw::Odroid_xu_board; + static constexpr bool NON_SECURE = false; } #endif /* _SRC__BOOTSTRAP__SPEC__ODROID_XU__BOARD_H_ */ diff --git a/repos/base-hw/src/bootstrap/spec/odroid_xu/platform.cc b/repos/base-hw/src/bootstrap/spec/odroid_xu/platform.cc index 10296f293..c90a7597f 100644 --- a/repos/base-hw/src/bootstrap/spec/odroid_xu/platform.cc +++ b/repos/base-hw/src/bootstrap/spec/odroid_xu/platform.cc @@ -25,7 +25,7 @@ Bootstrap::Platform::Board::Board() unsigned Bootstrap::Platform::enable_mmu() { - pic.init_cpu_local(); + board.pic.init_cpu_local(); Cpu::Sctlr::init(); Cpu::Cpsr::init(); cpu.invalidate_data_cache(); diff --git a/repos/base-hw/src/bootstrap/spec/panda/board.h b/repos/base-hw/src/bootstrap/spec/panda/board.h index db356ab77..3ee45d532 100644 --- a/repos/base-hw/src/bootstrap/spec/panda/board.h +++ b/repos/base-hw/src/bootstrap/spec/panda/board.h @@ -17,11 +17,13 @@ #include #include #include -#include +#include namespace Board { using namespace Hw::Panda_board; + static constexpr bool NON_SECURE = false; + class L2_cache; } diff --git a/repos/base-hw/src/bootstrap/spec/pbxa9/board.h b/repos/base-hw/src/bootstrap/spec/pbxa9/board.h index e5b9cd98d..92089d0c0 100644 --- a/repos/base-hw/src/bootstrap/spec/pbxa9/board.h +++ b/repos/base-hw/src/bootstrap/spec/pbxa9/board.h @@ -19,10 +19,12 @@ #include #include #include -#include +#include namespace Board { using namespace Hw::Pbxa9_board; + + static constexpr bool NON_SECURE = false; } #endif /* _SRC__BOOTSTRAP__SPEC__PBXA9__BOARD_H_ */ diff --git a/repos/base-hw/src/bootstrap/spec/riscv/board.h b/repos/base-hw/src/bootstrap/spec/riscv/board.h index 362d10989..2b6997544 100644 --- a/repos/base-hw/src/bootstrap/spec/riscv/board.h +++ b/repos/base-hw/src/bootstrap/spec/riscv/board.h @@ -18,8 +18,11 @@ namespace Board { using namespace Hw::Riscv_board; + struct Pic {}; } +namespace Bootstrap { struct Cpu {}; } + template void Sv39::Level_x_translation_table::_translation_added(addr_t, size_t) { } diff --git a/repos/base-hw/src/bootstrap/spec/rpi/board.h b/repos/base-hw/src/bootstrap/spec/rpi/board.h index ade417a77..f0ab46dc2 100644 --- a/repos/base-hw/src/bootstrap/spec/rpi/board.h +++ b/repos/base-hw/src/bootstrap/spec/rpi/board.h @@ -20,9 +20,9 @@ namespace Board { using namespace Hw::Rpi_board; -} -namespace Bootstrap { struct Pic {}; } + struct Pic {}; +} constexpr unsigned Hw::Page_table::Descriptor_base::_device_tex() { diff --git a/repos/base-hw/src/bootstrap/spec/rpi3/board.h b/repos/base-hw/src/bootstrap/spec/rpi3/board.h index d2a30a65c..15245263d 100644 --- a/repos/base-hw/src/bootstrap/spec/rpi3/board.h +++ b/repos/base-hw/src/bootstrap/spec/rpi3/board.h @@ -20,11 +20,11 @@ namespace Bootstrap { using Cpu = Hw::Arm_64_cpu; - struct Pic {}; }; namespace Board { using namespace Hw::Rpi3_board; + struct Pic {}; }; #endif /* _BOOTSTRAP__SPEC__RPI3__BOARD_H_ */ diff --git a/repos/base-hw/src/bootstrap/spec/usb_armory/board.h b/repos/base-hw/src/bootstrap/spec/usb_armory/board.h index ee84e43f8..30eb816e7 100644 --- a/repos/base-hw/src/bootstrap/spec/usb_armory/board.h +++ b/repos/base-hw/src/bootstrap/spec/usb_armory/board.h @@ -20,11 +20,11 @@ #include #include -namespace Bootstrap { using Hw::Pic; } - namespace Board { using namespace Hw::Usb_armory_board; + using Hw::Pic; + bool secure_irq(unsigned irq); } diff --git a/repos/base-hw/src/bootstrap/spec/wand_quad/board.h b/repos/base-hw/src/bootstrap/spec/wand_quad/board.h index ab90981b9..16e318f2d 100644 --- a/repos/base-hw/src/bootstrap/spec/wand_quad/board.h +++ b/repos/base-hw/src/bootstrap/spec/wand_quad/board.h @@ -18,13 +18,15 @@ #include #include #include -#include +#include namespace Board { using namespace Hw::Wand_quad_board; struct L2_cache; + static constexpr bool NON_SECURE = false; + static volatile unsigned long initial_values[][2] { // (IOMUX Controller) { 0x20e0000, 0x1 }, diff --git a/repos/base-hw/src/bootstrap/spec/x86_64/board.h b/repos/base-hw/src/bootstrap/spec/x86_64/board.h index c872f2ef7..aad53f3af 100644 --- a/repos/base-hw/src/bootstrap/spec/x86_64/board.h +++ b/repos/base-hw/src/bootstrap/spec/x86_64/board.h @@ -20,12 +20,12 @@ #include namespace Bootstrap { - struct Pic {}; using Cpu = Hw::X86_64_cpu; } namespace Board { using namespace Hw::Pc_board; + struct Pic {}; } #endif /* _SRC__BOOTSTRAP__SPEC__X86_64__BOARD_H_ */ diff --git a/repos/base-hw/src/bootstrap/spec/zynq_qemu/board.h b/repos/base-hw/src/bootstrap/spec/zynq_qemu/board.h index 3b12951ef..63cff449c 100644 --- a/repos/base-hw/src/bootstrap/spec/zynq_qemu/board.h +++ b/repos/base-hw/src/bootstrap/spec/zynq_qemu/board.h @@ -18,10 +18,11 @@ #include #include #include -#include +#include namespace Board { using namespace Hw::Zynq_qemu_board; + static constexpr bool NON_SECURE = false; } #endif /* _SRC__BOOTSTRAP__SPEC__ZYNQ__BOARD_H_ */ diff --git a/repos/base-hw/src/core/kernel/cpu.cc b/repos/base-hw/src/core/kernel/cpu.cc index 007e97a94..52655a67d 100644 --- a/repos/base-hw/src/core/kernel/cpu.cc +++ b/repos/base-hw/src/core/kernel/cpu.cc @@ -18,7 +18,6 @@ #include #include #include -#include #include #include #include @@ -56,7 +55,7 @@ void Cpu_job::_interrupt(unsigned const /* cpu_id */) { /* determine handling for specific interrupt */ unsigned irq_id; - if (pic().take_request(irq_id)) + if (_cpu->pic().take_request(irq_id)) /* is the interrupt a cpu-local one */ if (!_cpu->interrupt(irq_id)) { @@ -68,7 +67,7 @@ void Cpu_job::_interrupt(unsigned const /* cpu_id */) } /* end interrupt request at controller */ - pic().finish_request(); + _cpu->pic().finish_request(); } @@ -158,7 +157,7 @@ addr_t Cpu::stack_start() { return (addr_t)&kernel_stack + KERNEL_STACK_SIZE * (_id+1); } -Cpu::Cpu(unsigned const id, Pic & pic, +Cpu::Cpu(unsigned const id, Board::Pic & pic, Inter_processor_work_list & global_work_list) : _id(id), _pic(pic), _timer(*this), @@ -172,10 +171,10 @@ Cpu::Cpu(unsigned const id, Pic & pic, ** Cpu_pool ** **************/ -bool Cpu_pool::initialize(Pic & pic) +bool Cpu_pool::initialize() { unsigned id = Cpu::executing_id(); - _cpus[id].construct(id, pic, _global_work_list); + _cpus[id].construct(id, _pic, _global_work_list); return --_initialized == 0; } diff --git a/repos/base-hw/src/core/kernel/cpu.h b/repos/base-hw/src/core/kernel/cpu.h index 7c2fdb3d0..810ed7bc1 100644 --- a/repos/base-hw/src/core/kernel/cpu.h +++ b/repos/base-hw/src/core/kernel/cpu.h @@ -18,6 +18,7 @@ #include /* core includes */ +#include #include #include #include @@ -111,7 +112,7 @@ class Kernel::Cpu : public Genode::Cpu, private Irq::Pool, private Timeout unsigned const _id; - Pic &_pic; + Board::Pic &_pic; Timer _timer; Cpu_scheduler _scheduler; Idle_thread _idle; @@ -131,7 +132,7 @@ class Kernel::Cpu : public Genode::Cpu, private Irq::Pool, private Timeout /** * Construct object for CPU 'id' */ - Cpu(unsigned const id, Pic & pic, + Cpu(unsigned const id, Board::Pic & pic, Inter_processor_work_list & global_work_list); static inline unsigned primary_id() { return 0; } @@ -159,7 +160,8 @@ class Kernel::Cpu : public Genode::Cpu, private Irq::Pool, private Timeout */ Cpu_job& schedule(); - Timer & timer() { return _timer; } + Board::Pic & pic() { return _pic; } + Timer & timer() { return _timer; } addr_t stack_start(); @@ -189,6 +191,7 @@ class Kernel::Cpu_pool { private: + Board::Pic _pic {}; Inter_processor_work_list _global_work_list {}; unsigned _count; unsigned _initialized { _count }; @@ -198,7 +201,7 @@ class Kernel::Cpu_pool Cpu_pool(); - bool initialize(Pic & pic); + bool initialize(); /** * Return object of CPU 'id' diff --git a/repos/base-hw/src/core/kernel/cpu_mp.cc b/repos/base-hw/src/core/kernel/cpu_mp.cc index 3fd3ed68e..fa433e518 100644 --- a/repos/base-hw/src/core/kernel/cpu_mp.cc +++ b/repos/base-hw/src/core/kernel/cpu_mp.cc @@ -41,9 +41,9 @@ void Cpu::trigger_ip_interrupt() /* check whether there is still an IPI send */ if (_ipi_irq.pending) return; - pic().send_ipi(_id); + _pic.send_ipi(_id); _ipi_irq.pending = true; } -Cpu::Ipi::Ipi(Cpu & cpu) : Irq(Pic::IPI, cpu), cpu(cpu) { } +Cpu::Ipi::Ipi(Cpu & cpu) : Irq(Board::Pic::IPI, cpu), cpu(cpu) { } diff --git a/repos/base-hw/src/core/kernel/init.cc b/repos/base-hw/src/core/kernel/init.cc index fa84e30de..af1f7a5b9 100644 --- a/repos/base-hw/src/core/kernel/init.cc +++ b/repos/base-hw/src/core/kernel/init.cc @@ -18,7 +18,6 @@ #include #include #include -#include #include #include @@ -34,8 +33,6 @@ Pd &Kernel::core_pd() { return unmanaged_singleton()->kernel_pd(); } -Pic &Kernel::pic() { return *unmanaged_singleton(); } - extern "C" void kernel_init(); /** @@ -62,7 +59,7 @@ extern "C" void kernel_init() lock_ready = true; /* initialize current cpu */ - pool_ready = cpu_pool().initialize(pic()); + pool_ready = cpu_pool().initialize(); }; /* wait until all cpus have initialized their corresponding cpu object */ diff --git a/repos/base-hw/src/core/kernel/irq.cc b/repos/base-hw/src/core/kernel/irq.cc index 19003018c..87a6f7501 100644 --- a/repos/base-hw/src/core/kernel/irq.cc +++ b/repos/base-hw/src/core/kernel/irq.cc @@ -15,13 +15,14 @@ #include #include #include -#include -void Kernel::Irq::disable() const { pic().mask(_irq_nr); } +void Kernel::Irq::disable() const { + cpu_pool().executing_cpu().pic().mask(_irq_nr); } -void Kernel::Irq::enable() const { pic().unmask(_irq_nr, Cpu::executing_id()); } +void Kernel::Irq::enable() const { + cpu_pool().executing_cpu().pic().unmask(_irq_nr, Cpu::executing_id()); } Kernel::Irq::Pool &Kernel::User_irq::_pool() diff --git a/repos/base-hw/src/core/kernel/kernel.h b/repos/base-hw/src/core/kernel/kernel.h index c32403e14..9768aed16 100644 --- a/repos/base-hw/src/core/kernel/kernel.h +++ b/repos/base-hw/src/core/kernel/kernel.h @@ -15,8 +15,6 @@ #ifndef _CORE__KERNEL__KERNEL_H_ #define _CORE__KERNEL__KERNEL_H_ -#include - /** * Main routine of every kernel pass */ @@ -28,7 +26,6 @@ namespace Kernel { class Pd; Pd &core_pd(); - Pic &pic(); } #endif /* _CORE__KERNEL__KERNEL_H_ */ diff --git a/repos/base-hw/src/core/kernel/thread.cc b/repos/base-hw/src/core/kernel/thread.cc index 2f716faf8..68e4c9753 100644 --- a/repos/base-hw/src/core/kernel/thread.cc +++ b/repos/base-hw/src/core/kernel/thread.cc @@ -31,7 +31,6 @@ #include #include #include -#include extern "C" void _core_start(void); diff --git a/repos/base-hw/src/core/platform.cc b/repos/base-hw/src/core/platform.cc index c4350620c..46520f1f2 100644 --- a/repos/base-hw/src/core/platform.cc +++ b/repos/base-hw/src/core/platform.cc @@ -24,7 +24,6 @@ #include #include #include -#include #include #include #include @@ -163,14 +162,14 @@ Platform::Platform() _init_io_port_alloc(); /* make all non-kernel interrupts available to the interrupt allocator */ - for (unsigned i = 0; i < Kernel::Pic::NR_OF_IRQ; i++) { + for (unsigned i = 0; i < Board::Pic::NR_OF_IRQ; i++) { bool kernel_resource = false; Kernel::cpu_pool().for_each_cpu([&] (Kernel::Cpu & cpu) { if (i == cpu.timer().interrupt_id()) { kernel_resource = true; } }); - if (i == Pic::IPI) { + if (i == Board::Pic::IPI) { kernel_resource = true; } if (kernel_resource) { diff --git a/repos/base-hw/src/core/spec/rpi/pic.cc b/repos/base-hw/src/core/spec/arm/bcm2835_pic.cc similarity index 81% rename from repos/base-hw/src/core/spec/rpi/pic.cc rename to repos/base-hw/src/core/spec/arm/bcm2835_pic.cc index 26d8f72be..bfb3cba52 100644 --- a/repos/base-hw/src/core/spec/rpi/pic.cc +++ b/repos/base-hw/src/core/spec/arm/bcm2835_pic.cc @@ -1,5 +1,5 @@ /* - * \brief Pic implementation specific to Rpi + * \brief Pic implementation specific to Rpi 1 * \author Norman Feske * \author Stefan Kalkowski * \date 2016-01-07 @@ -12,12 +12,13 @@ * under the terms of the GNU Affero General Public License version 3. */ -#include +#include #include +using namespace Genode; -bool Genode::Usb_dwc_otg::_need_trigger_sof(uint32_t host_frame, - uint32_t scheduled_frame) +bool Board::Pic::Usb_dwc_otg::_need_trigger_sof(uint32_t host_frame, + uint32_t scheduled_frame) { uint32_t const max_frame = 0x3fff; @@ -35,7 +36,8 @@ bool Genode::Usb_dwc_otg::_need_trigger_sof(uint32_t host_frame, } -Genode::Usb_dwc_otg::Usb_dwc_otg() : Mmio(Platform::mmio_to_virt(Board::USB_DWC_OTG_BASE)) +Board::Pic::Usb_dwc_otg::Usb_dwc_otg() +: Mmio(Platform::mmio_to_virt(Board::USB_DWC_OTG_BASE)) { write(0); write(false); @@ -43,7 +45,7 @@ Genode::Usb_dwc_otg::Usb_dwc_otg() : Mmio(Platform::mmio_to_virt(Board::USB_DWC_ } -bool Genode::Usb_dwc_otg::handle_sof() +bool Board::Pic::Usb_dwc_otg::handle_sof() { if (!_is_sof()) return false; @@ -68,11 +70,11 @@ bool Genode::Usb_dwc_otg::handle_sof() } -Genode::Pic::Pic() +Board::Pic::Pic() : Mmio(Platform::mmio_to_virt(Board::IRQ_CONTROLLER_BASE)) { mask(); } -bool Genode::Pic::take_request(unsigned &irq) +bool Board::Pic::take_request(unsigned &irq) { /* read basic IRQ status mask */ uint32_t const p = read(); @@ -106,7 +108,7 @@ bool Genode::Pic::take_request(unsigned &irq) } -void Genode::Pic::mask() +void Board::Pic::mask() { write(~0); write(~0); @@ -114,7 +116,7 @@ void Genode::Pic::mask() } -void Genode::Pic::unmask(unsigned const i, unsigned) +void Board::Pic::unmask(unsigned const i, unsigned) { if (i < 8) write(1 << i); @@ -125,7 +127,7 @@ void Genode::Pic::unmask(unsigned const i, unsigned) } -void Genode::Pic::mask(unsigned const i) +void Board::Pic::mask(unsigned const i) { if (i < 8) write(1 << i); diff --git a/repos/base-hw/src/core/spec/rpi/pic.h b/repos/base-hw/src/core/spec/arm/bcm2835_pic.h similarity index 56% rename from repos/base-hw/src/core/spec/rpi/pic.h rename to repos/base-hw/src/core/spec/arm/bcm2835_pic.h index ba878877c..8f8ea420d 100644 --- a/repos/base-hw/src/core/spec/rpi/pic.h +++ b/repos/base-hw/src/core/spec/arm/bcm2835_pic.h @@ -11,72 +11,16 @@ * under the terms of the GNU Affero General Public License version 3. */ -#ifndef _CORE__SPEC__RPI__PIC_H_ -#define _CORE__SPEC__RPI__PIC_H_ +#ifndef _CORE__SPEC__ARM__BCM2835_PIC_H_ +#define _CORE__SPEC__ARM__BCM2835_PIC_H_ /* Genode includes */ #include -/* core includes */ -#include - -namespace Genode -{ - /** - * Programmable interrupt controller for core - */ - class Pic; - - class Usb_dwc_otg; -} +namespace Board { class Pic; } -class Genode::Usb_dwc_otg : Mmio -{ - private: - - struct Core_irq_status : Register<0x14, 32> - { - struct Sof : Bitfield<3, 1> { }; - }; - - struct Guid : Register<0x3c, 32> - { - struct Num : Bitfield<0, 14> { }; - - /* - * The USB driver set 'Num' to a defined value - */ - struct Num_valid : Bitfield<31, 1> { }; - - /* - * Filter is not used, overridden by the USB driver - */ - struct Kick : Bitfield<30, 1> { }; - }; - - struct Host_frame_number : Register<0x408, 32> - { - struct Num : Bitfield<0, 14> { }; - }; - - bool _is_sof() const - { - return read(); - } - - static bool _need_trigger_sof(uint32_t host_frame, - uint32_t scheduled_frame); - - public: - - Usb_dwc_otg(); - - bool handle_sof(); -}; - - -class Genode::Pic : Mmio +class Board::Pic : Genode::Mmio { public: @@ -107,12 +51,57 @@ class Genode::Pic : Mmio struct Irq_disable_gpu_2 : Register<0x20, 32> { }; struct Irq_disable_basic : Register<0x24, 32> { }; + class Usb_dwc_otg : Genode::Mmio + { + private: + + struct Core_irq_status : Register<0x14, 32> + { + struct Sof : Bitfield<3, 1> { }; + }; + + struct Guid : Register<0x3c, 32> + { + struct Num : Bitfield<0, 14> { }; + + /* + * The USB driver set 'Num' to a defined value + */ + struct Num_valid : Bitfield<31, 1> { }; + + /* + * Filter is not used, overridden by the USB driver + */ + struct Kick : Bitfield<30, 1> { }; + }; + + struct Host_frame_number : Register<0x408, 32> + { + struct Num : Bitfield<0, 14> { }; + }; + + bool _is_sof() const + { + return read(); + } + + static bool _need_trigger_sof(Genode::uint32_t host_frame, + Genode::uint32_t scheduled_frame); + + public: + + Usb_dwc_otg(); + + bool handle_sof(); + }; + Usb_dwc_otg _usb { }; /** * Return true if specified interrupt is pending */ - static bool _is_pending(unsigned i, uint32_t p1, uint32_t p2) + static bool _is_pending(unsigned i, Genode::uint32_t p1, + Genode::uint32_t p2) { return i < 32 ? (p1 & (1 << i)) : (p2 & (1 << (i - 32))); } @@ -121,7 +110,6 @@ class Genode::Pic : Mmio Pic(); - void init_cpu_local() { } bool take_request(unsigned &irq); void finish_request() { } void mask(); @@ -131,6 +119,4 @@ class Genode::Pic : Mmio static constexpr bool fast_interrupts() { return false; } }; -namespace Kernel { using Genode::Pic; } - -#endif /* _CORE__SPEC__RPI__PIC_H_ */ +#endif /* _CORE__SPEC__ARM__BCM2835_PIC_H_ */ diff --git a/repos/base-hw/src/core/spec/rpi3/pic.cc b/repos/base-hw/src/core/spec/arm/bcm2837_pic.cc similarity index 74% rename from repos/base-hw/src/core/spec/rpi3/pic.cc rename to repos/base-hw/src/core/spec/arm/bcm2837_pic.cc index 3c464add5..6de4699be 100644 --- a/repos/base-hw/src/core/spec/rpi3/pic.cc +++ b/repos/base-hw/src/core/spec/arm/bcm2837_pic.cc @@ -11,15 +11,15 @@ * under the terms of the GNU Affero General Public License version 3. */ -#include +#include #include -Genode::Pic::Pic() -: Mmio(Platform::mmio_to_virt(Board::LOCAL_IRQ_CONTROLLER_BASE)) { } +Board::Pic::Pic() +: Genode::Mmio(Genode::Platform::mmio_to_virt(Board::LOCAL_IRQ_CONTROLLER_BASE)) { } -bool Genode::Pic::take_request(unsigned & irq) +bool Board::Pic::take_request(unsigned & irq) { Core0_irq_source::access_t src = read(); if ((1 << TIMER_IRQ) & src) { @@ -30,10 +30,10 @@ bool Genode::Pic::take_request(unsigned & irq) } -void Genode::Pic::mask() { } +void Board::Pic::mask() { } -void Genode::Pic::unmask(unsigned const i, unsigned cpu) +void Board::Pic::unmask(unsigned const i, unsigned cpu) { if (cpu > 0) Genode::raw("multi-core irq controller not implemented yet"); @@ -47,7 +47,7 @@ void Genode::Pic::unmask(unsigned const i, unsigned cpu) } -void Genode::Pic::mask(unsigned const i) +void Board::Pic::mask(unsigned const i) { if (i == TIMER_IRQ) { write(0); diff --git a/repos/base-hw/src/core/spec/rpi3/pic.h b/repos/base-hw/src/core/spec/arm/bcm2837_pic.h similarity index 84% rename from repos/base-hw/src/core/spec/rpi3/pic.h rename to repos/base-hw/src/core/spec/arm/bcm2837_pic.h index b28966311..8339c0610 100644 --- a/repos/base-hw/src/core/spec/rpi3/pic.h +++ b/repos/base-hw/src/core/spec/arm/bcm2837_pic.h @@ -11,16 +11,14 @@ * under the terms of the GNU Affero General Public License version 3. */ -#ifndef _CORE__SPEC__RPI3__PIC_H_ -#define _CORE__SPEC__RPI3__PIC_H_ +#ifndef _CORE__SPEC__ARM__BCM2837_PIC_H_ +#define _CORE__SPEC__ARM__BCM2837_PIC_H_ #include -#include -namespace Genode { class Pic; } -namespace Kernel { using Pic = Genode::Pic; } +namespace Board { class Pic; } -class Genode::Pic : Mmio +class Board::Pic : Genode::Mmio { public: @@ -66,4 +64,4 @@ class Genode::Pic : Mmio static constexpr bool fast_interrupts() { return false; } }; -#endif /* _CORE__SPEC__RPI3__PIC_H_ */ +#endif /* _CORE__SPEC__ARM__BCM2837_PIC_H_ */ diff --git a/repos/base-hw/src/core/spec/arm/cpu.cc b/repos/base-hw/src/core/spec/arm/cpu.cc index 27184097b..d27e2eb30 100644 --- a/repos/base-hw/src/core/spec/arm/cpu.cc +++ b/repos/base-hw/src/core/spec/arm/cpu.cc @@ -26,8 +26,8 @@ Arm_cpu::Context::Context(bool privileged) Psr::access_t v = 0; Psr::M::set(v, privileged ? Psr::M::SYS : Psr::M::USR); - if (Genode::Pic::fast_interrupts()) Psr::I::set(v, 1); - else Psr::F::set(v, 1); + if (Board::Pic::fast_interrupts()) Psr::I::set(v, 1); + else Psr::F::set(v, 1); Psr::A::set(v, 1); cpsr = v; cpu_exception = RESET; diff --git a/repos/base-hw/src/core/spec/arm_gic/pic.cc b/repos/base-hw/src/core/spec/arm/gicv2.cc similarity index 92% rename from repos/base-hw/src/core/spec/arm_gic/pic.cc rename to repos/base-hw/src/core/spec/arm/gicv2.cc index ae71e3723..311cfe758 100644 --- a/repos/base-hw/src/core/spec/arm_gic/pic.cc +++ b/repos/base-hw/src/core/spec/arm/gicv2.cc @@ -12,13 +12,12 @@ */ /* core includes */ -#include -#include +#include #include using namespace Genode; -Hw::Pic::Pic() +Hw::Gicv2::Gicv2() : _distr(Platform::mmio_to_virt(Board::Cpu_mmio::IRQ_CONTROLLER_DISTR_BASE)), _cpui (Platform::mmio_to_virt(Board::Cpu_mmio::IRQ_CONTROLLER_CPU_BASE)), _last_iar(Cpu_interface::Iar::Irq_id::bits(spurious_id)), diff --git a/repos/base-hw/src/core/spec/imx53/pic.cc b/repos/base-hw/src/core/spec/arm/imx_tzic.cc similarity index 85% rename from repos/base-hw/src/core/spec/imx53/pic.cc rename to repos/base-hw/src/core/spec/arm/imx_tzic.cc index 0e54051ae..46b8dde55 100644 --- a/repos/base-hw/src/core/spec/imx53/pic.cc +++ b/repos/base-hw/src/core/spec/arm/imx_tzic.cc @@ -1,5 +1,5 @@ /* - * \brief Programmable interrupt controller for core + * \brief Freescale TrustZone aware interrupt controller for core * \author Stefan Kalkowski * \date 2012-10-24 */ @@ -13,7 +13,6 @@ /* core includes */ #include -#include #include using namespace Genode; diff --git a/repos/base-hw/src/core/spec/arm_gic/pic.h b/repos/base-hw/src/core/spec/arm_gic/pic.h deleted file mode 100644 index f4f23d259..000000000 --- a/repos/base-hw/src/core/spec/arm_gic/pic.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * \brief Programmable interrupt controller for core - * \author Martin stein - * \author Stefan Kalkowski - * \date 2011-10-26 - */ - -/* - * Copyright (C) 2011-2017 Genode Labs GmbH - * - * This file is part of the Genode OS framework, which is distributed - * under the terms of the GNU Affero General Public License version 3. - */ - -#ifndef _CORE__SPEC__ARM_GIC__PIC_H_ -#define _CORE__SPEC__ARM_GIC__PIC_H_ - -#include - -namespace Genode { class Pic; } -namespace Kernel { using Pic = Genode::Pic; } - -class Genode::Pic : public Hw::Pic -{ - public: - - enum { IPI = 1 }; - - /** - * Raise inter-processor IRQ of the CPU with kernel name 'cpu_id' - */ - void send_ipi(unsigned const cpu_id) - { - using Sgir = Distributor::Sgir; - Sgir::access_t sgir = 0; - Sgir::Sgi_int_id::set(sgir, IPI); - Sgir::Cpu_target_list::set(sgir, 1 << cpu_id); - _distr.write(sgir); - } - - /** - * Raise inter-processor interrupt on all other cores - */ - void send_ipi() - { - using Sgir = Distributor::Sgir; - Sgir::access_t sgir = 0; - Sgir::Sgi_int_id::set(sgir, IPI); - Sgir::Target_list_filter::set(sgir, - Sgir::Target_list_filter::ALL_OTHER); - _distr.write(sgir); - } - - static constexpr bool fast_interrupts() { return false; } -}; - -#endif /* _CORE__SPEC__ARM_GIC__PIC_H_ */ diff --git a/repos/base-hw/src/core/spec/arm_v7/trustzone/kernel/vm.cc b/repos/base-hw/src/core/spec/arm_v7/trustzone/kernel/vm.cc index a1ae65eb9..38e6fd966 100644 --- a/repos/base-hw/src/core/spec/arm_v7/trustzone/kernel/vm.cc +++ b/repos/base-hw/src/core/spec/arm_v7/trustzone/kernel/vm.cc @@ -62,10 +62,10 @@ void Vm::proceed(Cpu & cpu) { unsigned const irq = _state->irq_injection; if (irq) { - if (pic().secure(irq)) { + if (cpu.pic().secure(irq)) { Genode::raw("Refuse to inject secure IRQ into VM"); } else { - pic().trigger(irq); + cpu.pic().trigger(irq); _state->irq_injection = 0; } } diff --git a/repos/base-hw/src/core/spec/arndale/board.h b/repos/base-hw/src/core/spec/arndale/board.h index 52e9dbbe1..ad6414ad9 100644 --- a/repos/base-hw/src/core/spec/arndale/board.h +++ b/repos/base-hw/src/core/spec/arndale/board.h @@ -14,11 +14,14 @@ #ifndef _CORE__SPEC__ARNDALE__BOARD_H_ #define _CORE__SPEC__ARNDALE__BOARD_H_ +#include #include namespace Board { using namespace Hw::Arndale_board; + using Pic = Hw::Gicv2; + static constexpr bool SMP = true; } diff --git a/repos/base-hw/src/core/spec/imx53/pic.h b/repos/base-hw/src/core/spec/imx53/pic.h deleted file mode 100644 index f21069f00..000000000 --- a/repos/base-hw/src/core/spec/imx53/pic.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * \brief Programmable interrupt controller for core - * \author Stefan Kalkowski - * \date 2012-10-24 - */ - -/* - * Copyright (C) 2012-2017 Genode Labs GmbH - * - * This file is part of the Genode OS framework, which is distributed - * under the terms of the GNU Affero General Public License version 3. - */ - -#ifndef _CORE__SPEC__IMX53__PIC_H_ -#define _CORE__SPEC__IMX53__PIC_H_ - -#include - -namespace Genode { class Pic; } - - -class Genode::Pic : public Hw::Pic -{ - public: - - enum { - /* - * FIXME: dummy ipi value on non-SMP platform, should be removed - * when SMP is an aspect of CPUs only compiled where necessary - */ - IPI = 0, - }; - - /* - * Trigger interrupt 'i' from software if possible - */ - void trigger(unsigned const i) { - write(Swint::Intid::bits(i)); } - - bool secure(unsigned i) { - return !read(i); } - - static constexpr bool fast_interrupts() { return true; } -}; - -namespace Kernel { using Pic = Genode::Pic; } - -#endif /* _CORE__SPEC__IMX53__PIC_H_ */ diff --git a/repos/base-hw/src/core/spec/imx53_qsb/board.h b/repos/base-hw/src/core/spec/imx53_qsb/board.h index 3b182ce46..d14d72ee7 100644 --- a/repos/base-hw/src/core/spec/imx53_qsb/board.h +++ b/repos/base-hw/src/core/spec/imx53_qsb/board.h @@ -15,11 +15,12 @@ #ifndef _CORE__SPEC__IMX53_QSB__BOARD_H_ #define _CORE__SPEC__IMX53_QSB__BOARD_H_ +#include #include namespace Board { using namespace Hw::Imx53_qsb_board; - + using Hw::Pic; static constexpr bool SMP = false; } diff --git a/repos/base-hw/src/core/spec/imx6q_sabrelite/board.h b/repos/base-hw/src/core/spec/imx6q_sabrelite/board.h index 4dc8f1f37..5920360d9 100644 --- a/repos/base-hw/src/core/spec/imx6q_sabrelite/board.h +++ b/repos/base-hw/src/core/spec/imx6q_sabrelite/board.h @@ -14,12 +14,14 @@ #ifndef _CORE__SPEC__IMX6Q_SABRELITE__BOARD_H_ #define _CORE__SPEC__IMX6Q_SABRELITE__BOARD_H_ +#include #include namespace Board { using namespace Hw::Imx6q_sabrelite_board; + using Pic = Hw::Gicv2; using L2_cache = Hw::Pl310; static constexpr bool SMP = true; diff --git a/repos/base-hw/src/core/spec/imx7d_sabre/board.h b/repos/base-hw/src/core/spec/imx7d_sabre/board.h index 21886fcfb..6a3863235 100644 --- a/repos/base-hw/src/core/spec/imx7d_sabre/board.h +++ b/repos/base-hw/src/core/spec/imx7d_sabre/board.h @@ -14,11 +14,14 @@ #ifndef _CORE__SPEC__IMX7D_SABRE__BOARD_H_ #define _CORE__SPEC__IMX7D_SABRE__BOARD_H_ +#include #include namespace Board { using namespace Hw::Imx7d_sabre_board; - + + using Pic = Hw::Gicv2; + static constexpr bool SMP = true; } diff --git a/repos/base-hw/src/core/spec/nit6_solox/board.h b/repos/base-hw/src/core/spec/nit6_solox/board.h index 13c6272a1..95ac42f87 100644 --- a/repos/base-hw/src/core/spec/nit6_solox/board.h +++ b/repos/base-hw/src/core/spec/nit6_solox/board.h @@ -14,11 +14,13 @@ #ifndef _CORE__SPEC__NIT6_SOLOX__BOARD_H_ #define _CORE__SPEC__NIT6_SOLOX__BOARD_H_ +#include #include namespace Board { using namespace Hw::Nit6_solox_board; + using Pic = Hw::Gicv2; using L2_cache = Hw::Pl310; static constexpr bool SMP = true; diff --git a/repos/base-hw/src/core/spec/odroid_xu/board.h b/repos/base-hw/src/core/spec/odroid_xu/board.h index 89b5a6b9e..a57370e3e 100644 --- a/repos/base-hw/src/core/spec/odroid_xu/board.h +++ b/repos/base-hw/src/core/spec/odroid_xu/board.h @@ -14,11 +14,14 @@ #ifndef _CORE__SPEC__ODROID_XU__BOARD_H_ #define _CORE__SPEC__ODROID_XU__BOARD_H_ +#include #include namespace Board { using namespace Hw::Odroid_xu_board; + using Pic = Hw::Gicv2; + static constexpr bool SMP = true; } diff --git a/repos/base-hw/src/core/spec/panda/board.h b/repos/base-hw/src/core/spec/panda/board.h index b06e083e3..8a503aa3c 100644 --- a/repos/base-hw/src/core/spec/panda/board.h +++ b/repos/base-hw/src/core/spec/panda/board.h @@ -15,11 +15,14 @@ #ifndef _CORE__SPEC__PANDA__BOARD_H_ #define _CORE__SPEC__PANDA__BOARD_H_ +#include #include namespace Board { using namespace Hw::Panda_board; + using Pic = Hw::Gicv2; + static constexpr bool SMP = true; class L2_cache : public Hw::Pl310 diff --git a/repos/base-hw/src/core/spec/pbxa9/board.h b/repos/base-hw/src/core/spec/pbxa9/board.h index fc416607a..b9905914d 100644 --- a/repos/base-hw/src/core/spec/pbxa9/board.h +++ b/repos/base-hw/src/core/spec/pbxa9/board.h @@ -14,11 +14,14 @@ #ifndef _CORE__SPEC__PBXA9__BOARD_H_ #define _CORE__SPEC__PBXA9__BOARD_H_ +#include #include namespace Board { using namespace Hw::Pbxa9_board; + using Pic = Hw::Gicv2; + static constexpr bool SMP = true; L2_cache & l2_cache(); diff --git a/repos/base-hw/src/core/spec/riscv/board.h b/repos/base-hw/src/core/spec/riscv/board.h index 790e799e6..a112d715c 100644 --- a/repos/base-hw/src/core/spec/riscv/board.h +++ b/repos/base-hw/src/core/spec/riscv/board.h @@ -15,9 +15,8 @@ #define _CORE__SPEC__RISCV__BOARD_H_ #include +#include -namespace Board { - using namespace Hw::Riscv_board; -} +namespace Board { using namespace Hw::Riscv_board; } #endif /* _CORE__SPEC__RISCV__BOARD_H_ */ diff --git a/repos/base-hw/src/core/spec/riscv/pic.h b/repos/base-hw/src/core/spec/riscv/pic.h index 5528ec5a4..db66fb01e 100644 --- a/repos/base-hw/src/core/spec/riscv/pic.h +++ b/repos/base-hw/src/core/spec/riscv/pic.h @@ -16,12 +16,12 @@ #ifndef _CORE__SPEC__RISCV__PIC_H_ #define _CORE__SPEC__RISCV__PIC_H_ -namespace Genode { class Pic; } +namespace Board { class Pic; } /** * Dummy PIC driver for core */ -class Genode::Pic +class Board::Pic { public: @@ -41,6 +41,4 @@ class Genode::Pic void finish_request() { } }; -namespace Kernel { class Pic : public Genode::Pic { }; } - #endif /* _CORE__SPEC__RISCV__PIC_H_ */ diff --git a/repos/base-hw/src/core/spec/rpi/board.h b/repos/base-hw/src/core/spec/rpi/board.h index 50575eed5..55635bb63 100644 --- a/repos/base-hw/src/core/spec/rpi/board.h +++ b/repos/base-hw/src/core/spec/rpi/board.h @@ -16,6 +16,7 @@ #define _CORE__SPEC__RPI__BOARD_H_ #include +#include namespace Board { using namespace Hw::Rpi_board; diff --git a/repos/base-hw/src/core/spec/rpi3/board.h b/repos/base-hw/src/core/spec/rpi3/board.h index 2b3c0e35c..f60c347cb 100644 --- a/repos/base-hw/src/core/spec/rpi3/board.h +++ b/repos/base-hw/src/core/spec/rpi3/board.h @@ -15,6 +15,7 @@ #define _CORE__SPEC__RPI3__BOARD_H_ #include +#include namespace Board { using namespace Hw::Rpi3_board; diff --git a/repos/base-hw/src/core/spec/rpi3/timer.cc b/repos/base-hw/src/core/spec/rpi3/timer.cc index 0c5b8d32b..5ebd7c283 100644 --- a/repos/base-hw/src/core/spec/rpi3/timer.cc +++ b/repos/base-hw/src/core/spec/rpi3/timer.cc @@ -18,7 +18,7 @@ using namespace Kernel; -unsigned Timer::interrupt_id() const { return Genode::Pic::TIMER_IRQ; } +unsigned Timer::interrupt_id() const { return Board::Pic::TIMER_IRQ; } unsigned long Timer_driver::_freq() { return Genode::Cpu::Cntfrq_el0::read(); } diff --git a/repos/base-hw/src/core/spec/usb_armory/board.h b/repos/base-hw/src/core/spec/usb_armory/board.h index e6c50d6aa..66946154d 100644 --- a/repos/base-hw/src/core/spec/usb_armory/board.h +++ b/repos/base-hw/src/core/spec/usb_armory/board.h @@ -15,11 +15,14 @@ #ifndef _CORE__SPEC__USB_ARMORY__BOARD_H_ #define _CORE__SPEC__USB_ARMORY__BOARD_H_ +#include #include namespace Board { using namespace Hw::Usb_armory_board; + using Hw::Pic; + static constexpr bool SMP = false; } diff --git a/repos/base-hw/src/core/spec/wand_quad/board.h b/repos/base-hw/src/core/spec/wand_quad/board.h index 01bf528ac..4957a9b2d 100644 --- a/repos/base-hw/src/core/spec/wand_quad/board.h +++ b/repos/base-hw/src/core/spec/wand_quad/board.h @@ -15,12 +15,14 @@ #ifndef _CORE__SPEC__WAND_QUAD__BOARD_H_ #define _CORE__SPEC__WAND_QUAD__BOARD_H_ +#include #include namespace Board { using namespace Hw::Wand_quad_board; using L2_cache = Hw::Pl310; + using Pic = Hw::Gicv2; static constexpr bool SMP = true; diff --git a/repos/base-hw/src/core/spec/x86_64/board.h b/repos/base-hw/src/core/spec/x86_64/board.h index 00506b7ee..ecd971ede 100644 --- a/repos/base-hw/src/core/spec/x86_64/board.h +++ b/repos/base-hw/src/core/spec/x86_64/board.h @@ -15,6 +15,7 @@ #define _CORE__SPEC__X86_64__BOARD_H_ #include +#include namespace Board { using namespace Hw::Pc_board; diff --git a/repos/base-hw/src/core/spec/x86_64/muen/board.h b/repos/base-hw/src/core/spec/x86_64/muen/board.h index 3ae097478..682481fdd 100644 --- a/repos/base-hw/src/core/spec/x86_64/muen/board.h +++ b/repos/base-hw/src/core/spec/x86_64/muen/board.h @@ -15,6 +15,7 @@ #define _CORE__SPEC__X86_64__MUEN__BOARD_H_ #include +#include namespace Board { using namespace Hw::Pc_board; diff --git a/repos/base-hw/src/core/spec/x86_64/muen/kernel/thread_exception.cc b/repos/base-hw/src/core/spec/x86_64/muen/kernel/thread_exception.cc index 6890e229a..bb7a1e1ed 100644 --- a/repos/base-hw/src/core/spec/x86_64/muen/kernel/thread_exception.cc +++ b/repos/base-hw/src/core/spec/x86_64/muen/kernel/thread_exception.cc @@ -15,7 +15,6 @@ /* core includes */ #include #include -#include using namespace Kernel; @@ -35,7 +34,7 @@ void Thread::exception(Cpu & cpu) } if (regs->trapno >= Cpu::Context::INTERRUPTS_START && regs->trapno <= Cpu::Context::INTERRUPTS_END) { - pic().irq_occurred(regs->trapno); + cpu.pic().irq_occurred(regs->trapno); _interrupt(cpu.id()); return; } diff --git a/repos/base-hw/src/core/spec/x86_64/muen/kernel/vm.cc b/repos/base-hw/src/core/spec/x86_64/muen/kernel/vm.cc index a6aa645de..f3a32bd34 100644 --- a/repos/base-hw/src/core/spec/x86_64/muen/kernel/vm.cc +++ b/repos/base-hw/src/core/spec/x86_64/muen/kernel/vm.cc @@ -18,7 +18,6 @@ #include #include #include -#include Kernel::Vm::Vm(void * const state, Kernel::Signal_context * const context, void * const) @@ -44,7 +43,7 @@ void Kernel::Vm::exception(Cpu & cpu) if (_state->trapno >= Genode::Cpu_state::INTERRUPTS_START && _state->trapno <= Genode::Cpu_state::INTERRUPTS_END) { - pic().irq_occurred(_state->trapno); + cpu.pic().irq_occurred(_state->trapno); _interrupt(cpu.id()); _context->submit(1); return; diff --git a/repos/base-hw/src/core/spec/x86_64/muen/pic.h b/repos/base-hw/src/core/spec/x86_64/muen/pic.h index a02940df7..0d3161a14 100644 --- a/repos/base-hw/src/core/spec/x86_64/muen/pic.h +++ b/repos/base-hw/src/core/spec/x86_64/muen/pic.h @@ -14,7 +14,7 @@ #ifndef _CORE__SPEC__X86_64__MUEN__PIC_H_ #define _CORE__SPEC__X86_64__MUEN__PIC_H_ -namespace Genode +namespace Board { /** * Programmable interrupt controller for core @@ -22,7 +22,7 @@ namespace Genode class Pic; } -class Genode::Pic +class Board::Pic { public: @@ -68,6 +68,4 @@ class Genode::Pic bool isr[NR_OF_IRQ] = {false}; }; -namespace Kernel { class Pic : public Genode::Pic { }; } - #endif /* _CORE__SPEC__X86_64__MUEN__PIC_H_ */ diff --git a/repos/base-hw/src/core/spec/x86_64/pic.cc b/repos/base-hw/src/core/spec/x86_64/pic.cc index 8182e1573..58a4d9893 100644 --- a/repos/base-hw/src/core/spec/x86_64/pic.cc +++ b/repos/base-hw/src/core/spec/x86_64/pic.cc @@ -19,10 +19,10 @@ /* core includes */ #include -#include #include using namespace Genode; +using namespace Board; uint8_t Pic::lapic_ids[NR_OF_CPUS]; @@ -123,6 +123,8 @@ void Pic::send_ipi(unsigned const cpu_id) { Ioapic::Irq_mode Ioapic::_irq_mode[IRQ_COUNT]; +enum { REMAP_BASE = Board::VECTOR_REMAP_BASE }; + void Ioapic::setup_irq_mode(unsigned irq_number, unsigned trigger, unsigned polarity) { diff --git a/repos/base-hw/src/core/spec/x86_64/pic.h b/repos/base-hw/src/core/spec/x86_64/pic.h index 71ecdb1ea..6f6d896de 100644 --- a/repos/base-hw/src/core/spec/x86_64/pic.h +++ b/repos/base-hw/src/core/spec/x86_64/pic.h @@ -21,7 +21,7 @@ /* core includes */ #include -namespace Genode +namespace Board { /* * Redirection table entry @@ -41,19 +41,17 @@ namespace Genode enum { IRQ_COUNT = 256 }; } -struct Genode::Irte : Register<64> +struct Board::Irte : Genode::Register<64> { struct Pol : Bitfield<13, 1> { }; struct Trg : Bitfield<15, 1> { }; struct Mask : Bitfield<16, 1> { }; }; -class Genode::Ioapic : public Mmio +class Board::Ioapic : public Genode::Mmio { private: - enum { REMAP_BASE = Board::VECTOR_REMAP_BASE }; - /* Number of Redirection Table entries */ unsigned _irte_count = 0; @@ -135,7 +133,7 @@ class Genode::Ioapic : public Mmio }; }; -class Genode::Pic : public Mmio +class Board::Pic : public Genode::Mmio { private: @@ -180,7 +178,7 @@ class Genode::Pic : public Mmio /** * Mapping of our logical boot CPUs to the local APIC IDs */ - static uint8_t lapic_ids[NR_OF_CPUS]; + static Genode::uint8_t lapic_ids[NR_OF_CPUS]; public: @@ -217,6 +215,4 @@ class Genode::Pic : public Mmio void send_ipi(unsigned const); }; -namespace Kernel { using Genode::Pic; } - #endif /* _CORE__SPEC__X86_64__PIC_H_ */ diff --git a/repos/base-hw/src/core/spec/x86_64/platform_support.cc b/repos/base-hw/src/core/spec/x86_64/platform_support.cc index 247b3ca05..2637f6897 100644 --- a/repos/base-hw/src/core/spec/x86_64/platform_support.cc +++ b/repos/base-hw/src/core/spec/x86_64/platform_support.cc @@ -13,7 +13,7 @@ #include #include -#include +#include #include using namespace Genode; @@ -60,8 +60,12 @@ void Platform::_init_additional_platform_info(Xml_generator &xml) void Platform::setup_irq_mode(unsigned irq_number, unsigned trigger, - unsigned polarity) { - Kernel::pic().ioapic.setup_irq_mode(irq_number, trigger, polarity); } + unsigned polarity) +{ + Kernel::cpu_pool().executing_cpu().pic().ioapic.setup_irq_mode(irq_number, + trigger, + polarity); +} bool Platform::get_msi_params(addr_t, addr_t &, addr_t &, unsigned &) { diff --git a/repos/base-hw/src/core/spec/zynq_qemu/board.h b/repos/base-hw/src/core/spec/zynq_qemu/board.h index f776d8b7d..b61c351bb 100644 --- a/repos/base-hw/src/core/spec/zynq_qemu/board.h +++ b/repos/base-hw/src/core/spec/zynq_qemu/board.h @@ -16,11 +16,14 @@ #ifndef _CORE__SPEC__ZYNQ_QEMU__BOARD_H_ #define _CORE__SPEC__ZYNQ_QEMU__BOARD_H_ +#include #include namespace Board { using namespace Hw::Zynq_qemu_board; + using Pic = Hw::Gicv2; + static constexpr bool SMP = true; L2_cache & l2_cache(); diff --git a/repos/base-hw/src/include/hw/spec/arm/pic.h b/repos/base-hw/src/include/hw/spec/arm/gicv2.h similarity index 86% rename from repos/base-hw/src/include/hw/spec/arm/pic.h rename to repos/base-hw/src/include/hw/spec/arm/gicv2.h index f106e7a97..501520e48 100644 --- a/repos/base-hw/src/include/hw/spec/arm/pic.h +++ b/repos/base-hw/src/include/hw/spec/arm/gicv2.h @@ -1,25 +1,25 @@ /* - * \brief Programmable interrupt controller for core + * \brief ARM generic interrupt controller v2 * \author Martin stein * \author Stefan Kalkowski * \date 2011-10-26 */ /* - * Copyright (C) 2011-2013 Genode Labs GmbH + * Copyright (C) 2011-2019 Genode Labs GmbH * * This file is part of the Genode OS framework, which is distributed * under the terms of the GNU Affero General Public License version 3. */ -#ifndef _SRC__LIB__HW__SPEC__ARM__PIC_H_ -#define _SRC__LIB__HW__SPEC__ARM__PIC_H_ +#ifndef _SRC__LIB__HW__SPEC__ARM__GICv2_H_ +#define _SRC__LIB__HW__SPEC__ARM__GICv2_H_ #include -namespace Hw { class Pic; } +namespace Hw { class Gicv2; } -class Hw::Pic +class Hw::Gicv2 { protected: @@ -168,7 +168,7 @@ class Hw::Pic Distributor _distr; Cpu_interface _cpui; Cpu_interface::Iar::access_t _last_iar; - unsigned const _max_irq; + unsigned const _max_irq; void _init(); @@ -176,9 +176,9 @@ class Hw::Pic public: - enum { NR_OF_IRQ = Distributor::nr_of_irq }; + enum { IPI = 1, NR_OF_IRQ = Distributor::nr_of_irq }; - Pic(); + Gicv2(); /** * Try to take an IRQ and return wether it was successful @@ -219,6 +219,20 @@ class Hw::Pic */ void mask(unsigned const irq_id) { _distr.write(1, irq_id); } + + /** + * Raise inter-processor IRQ of the CPU with kernel name 'cpu_id' + */ + void send_ipi(unsigned const cpu_id) + { + using Sgir = Distributor::Sgir; + Sgir::access_t sgir = 0; + Sgir::Sgi_int_id::set(sgir, IPI); + Sgir::Cpu_target_list::set(sgir, 1 << cpu_id); + _distr.write(sgir); + } + + static constexpr bool fast_interrupts() { return false; } }; -#endif /* _SRC__LIB__HW__SPEC__ARM__PIC_H_ */ +#endif /* _SRC__LIB__HW__SPEC__ARM__GICv2_H_ */ diff --git a/repos/base-hw/src/include/hw/spec/arm/imx_tzic.h b/repos/base-hw/src/include/hw/spec/arm/imx_tzic.h index aebbe58ce..0777fa3b3 100644 --- a/repos/base-hw/src/include/hw/spec/arm/imx_tzic.h +++ b/repos/base-hw/src/include/hw/spec/arm/imx_tzic.h @@ -85,6 +85,8 @@ class Hw::Pic : public Genode::Mmio public: + enum { IPI = 0xffff }; + Pic(); /** @@ -113,6 +115,17 @@ class Hw::Pic : public Genode::Mmio */ void mask(unsigned const i) { if (_valid(i)) { write(1, i); } } + + /* + * Trigger interrupt 'i' from software if possible + */ + void trigger(unsigned const i) { + write(Swint::Intid::bits(i)); } + + bool secure(unsigned i) { + return !read(i); } + + static constexpr bool fast_interrupts() { return true; } }; #endif /* _SRC__LIB__HW__SPEC__ARM__IMX_TZIC_H_ */ diff --git a/repos/base-hw/src/include/hw/spec/riscv/board.h b/repos/base-hw/src/include/hw/spec/riscv/board.h index 4a7faea0b..fc69fbb59 100644 --- a/repos/base-hw/src/include/hw/spec/riscv/board.h +++ b/repos/base-hw/src/include/hw/spec/riscv/board.h @@ -19,11 +19,6 @@ #include #include -namespace Bootstrap { - struct Cpu {}; - struct Pic {}; -} - namespace Hw::Riscv_board { using namespace Riscv;