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hw: use bios data area to detect com/uart ports 

Fixes #1625
This commit is contained in:
Alexander Boettcher 2015-07-09 11:45:05 +02:00 committed by Norman Feske
parent 0b019d0508
commit 73f7a95627
3 changed files with 73 additions and 6 deletions
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56
repos/base-hw/src/core/include/spec/x86/serial.h
View File

@ -15,8 +15,55 @@
/* Genode includes */
#include <drivers/uart/x86_uart_base.h>
#include <util/mmio.h>
#include <unmanaged_singleton.h>
namespace Genode { class Serial; }
namespace Genode
{
enum { BDA_MMIO_BASE_VIRT = 0x1ff000 };
class Bios_data_area;
class Serial;
Bios_data_area * bda();
}
class Genode::Bios_data_area : Mmio
{
friend Unmanaged_singleton_constructor;
private:
struct Serial_base_com1 : Register<0x400, 16> { };
struct Equipment : Register<0x410, 16>
{
struct Serial_count : Bitfield<9, 3> { };
};
/*
* Constructor
*
* The BDA page must be mapped already (see crt0_translation_table.s).
*/
Bios_data_area() : Mmio(BDA_MMIO_BASE_VIRT) { }
public:
/**
* Obtain I/O ports of COM interfaces from BDA
*/
addr_t serial_port() const
{
Equipment::access_t count = read<Equipment::Serial_count>();
return count ? read<Serial_base_com1>() : 0;
}
/**
* Return BDA singleton
*/
static Bios_data_area * singleton() {
return unmanaged_singleton<Bios_data_area>(); }
};
/**
* Serial output driver for core
@ -25,10 +72,13 @@ class Genode::Serial : public X86_uart_base
{
private:
enum { IO_PORT = 0x3f8, CLOCK_UNUSED = 0 };
enum { CLOCK_UNUSED = 0 };
public:
Serial(unsigned baud_rate)
: X86_uart_base(IO_PORT, CLOCK_UNUSED, baud_rate) { }
:
X86_uart_base(Bios_data_area::singleton()->serial_port(),
CLOCK_UNUSED, baud_rate)
{ }
};

14
repos/base-hw/src/core/spec/x86/cpu.cc
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@ -15,8 +15,18 @@
#include <cpu.h>
#include <kernel/pd.h>
void Genode::Cpu::init_virt_kernel(Kernel::Pd * pd) {
Cr3::write(Cr3::init((addr_t)pd->translation_table())); }
void Genode::Cpu::init_virt_kernel(Kernel::Pd * pd)
{
/*
* Please do not remove the PINF(), because the serial constructor requires
* access to the Bios Data Area, which is available in the initial
* translation table set, but not in the final tables used after
* Cr3::write().
*/
PINF("Switch to core's final translation table");
Cr3::write(Cr3::init((addr_t)pd->translation_table()));
}
void Genode::Cpu::_init_fpu()

9
repos/base-hw/src/core/spec/x86_64/kernel/crt0_translation_table.s
View File

@ -19,6 +19,8 @@
/********************************************
** Identity mapping from 2MiB to 16MiB **
** plus mappings for LAPIC, I/O APIC MMIO **
** Page 0 containing the Bios Data Area **
** gets mapped to 2MB - 4K readonly. **
********************************************/
/* PML4 */
@ -39,7 +41,7 @@
/* PD */
.p2align MIN_PAGE_SIZE_LOG2
_kernel_pd:
.quad 0
.quad _kernel_pt_bda + 0xf
.quad 0x20018f
.quad 0x40018f
.quad 0x60018f
@ -55,3 +57,8 @@
.quad 0xfec0019f
.quad 0xfee0019f
.fill 8, 8, 0x0
.p2align MIN_PAGE_SIZE_LOG2
_kernel_pt_bda:
.fill 511, 8, 0x0
.quad 0x000001