platform/x86: support 64-bit base address registers
The API still exports 32-bit address and size values only, which works as the actual MMIO resources are allocated in platform_drv internally. Fixes #3494
This commit is contained in:
Christian Helmuth
parent
e0af9c2d8b
commit
6df8b44616
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@ -13,18 +13,19 @@
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#include "pci_session_component.h"
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#include "pci_device_component.h"
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Genode::Io_port_session_capability Platform::Device_component::io_port(Genode::uint8_t v_id)
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Genode::Io_port_session_capability Platform::Device_component::io_port(Genode::uint8_t const v_id)
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{
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Genode::uint8_t max = sizeof(_io_port_conn) / sizeof(_io_port_conn[0]);
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Genode::uint8_t i = 0, r_id = 0;
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Genode::uint8_t const max = sizeof(_io_port_conn) / sizeof(_io_port_conn[0]);
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Genode::uint8_t r_id = 0;
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for (Resource res = resource(0); i < max; i++, res = resource(i))
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{
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if (res.type() != Resource::IO)
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for (unsigned i = 0; i < max; ++i) {
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Pci::Resource res = _device_config.resource(i);
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if (!res.valid() || res.mem())
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continue;
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if (v_id != r_id) {
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r_id ++;
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++r_id;
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continue;
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}
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@ -48,15 +49,16 @@ Genode::Io_mem_session_capability Platform::Device_component::io_mem(Genode::uin
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Genode::size_t const size)
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{
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Genode::uint8_t max = sizeof(_io_mem) / sizeof(_io_mem[0]);
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Genode::uint8_t i = 0, r_id = 0;
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Genode::uint8_t r_id = 0;
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for (Resource res = resource(0); i < max; i++, res = resource(i))
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{
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if (res.type() != Resource::MEMORY)
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for (unsigned i = 0; i < max; ++i) {
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Pci::Resource res = _device_config.resource(i);
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if (!res.valid() || !res.mem())
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continue;
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if (v_id != r_id) {
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r_id ++;
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++r_id;
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continue;
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}
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@ -66,6 +68,14 @@ Genode::Io_mem_session_capability Platform::Device_component::io_mem(Genode::uin
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if (offset >= res.size() || offset > res.size() - res_size)
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return Genode::Io_mem_session_capability();
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/* error if MEM64 resource base address above 4G on 32-bit */
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if (res.base() > ~(addr_t)0) {
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Genode::error("request for MEM64 resource of ", _device_config,
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" at ", Genode::Hex(res.base()),
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" not supported on 32-bit system");
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return Genode::Io_mem_session_capability();
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}
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try {
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bool const wc = caching == Genode::Cache_attribute::WRITE_COMBINED;
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Io_mem * io_mem = new (_slab_iomem) Io_mem(_env,
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@ -89,8 +89,10 @@ class Platform::Device_component : public Genode::Rpc_object<Platform::Device>,
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char _mem_irq_component[sizeof(Irq_session_component)];
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Genode::Io_port_connection *_io_port_conn [Device::NUM_RESOURCES];
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Genode::List<Io_mem> _io_mem [Device::NUM_RESOURCES];
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Genode::Io_port_connection *_io_port_conn[Device::NUM_RESOURCES];
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/* list of requested resource chunks per BAR */
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Genode::List<Io_mem> _io_mem[Device::NUM_RESOURCES];
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struct Status : Genode::Register<8> {
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struct Capabilities : Bitfield<4,1> { };
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@ -189,7 +191,7 @@ class Platform::Device_component : public Genode::Rpc_object<Platform::Device>,
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public:
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/**
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* Constructor
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* Constructor for PCI devices
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*/
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Device_component(Genode::Env &env,
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Device_config device_config, Genode::addr_t addr,
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@ -263,7 +265,7 @@ class Platform::Device_component : public Genode::Rpc_object<Platform::Device>,
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** Methods used solely by pci session **
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****************************************/
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Device_config config() const { return _device_config; }
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Device_config device_config() const { return _device_config; }
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Genode::addr_t config_space() const { return _config_space; }
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/**************************
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@ -290,7 +292,7 @@ class Platform::Device_component : public Genode::Rpc_object<Platform::Device>,
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if (!_device_config.valid())
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return Resource(0, 0);
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return _device_config.resource(resource_id);
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return _device_config.resource(resource_id).api_resource();
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}
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unsigned config_read(unsigned char address, Access_size size) override
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@ -16,8 +16,81 @@
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#include <base/output.h>
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#include <platform_device/platform_device.h>
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#include <util/register.h>
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#include "pci_config_access.h"
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namespace Platform { namespace Pci {
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struct Resource;
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} }
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class Platform::Pci::Resource
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{
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public:
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struct Bar : Genode::Register<32>
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{
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struct Space : Bitfield<0,1> { enum { MEM = 0, PORT = 1 }; };
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struct Mem_type : Bitfield<1,2> { enum { MEM32 = 0, MEM64 = 2 }; };
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struct Mem_prefetch : Bitfield<3,1> { };
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struct Mem_address_mask : Bitfield<4,28> { };
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struct Port_address_mask : Bitfield<2,14> { };
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static bool mem(access_t r) { return Space::get(r) == Space::MEM; }
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static bool mem64(access_t r) { return mem(r)
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&& Mem_type::get(r) == Mem_type::MEM64; }
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static uint64_t mem_address(access_t r0, uint64_t r1) { return (r1 << 32) | Mem_address_mask::masked(r0); }
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static uint64_t mem_size(access_t r0, uint64_t r1) { return ~mem_address(r0, r1) + 1; }
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static uint16_t port_address(access_t r) { return Port_address_mask::masked(r); }
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static uint16_t port_size(access_t r) { return ~port_address(r) + 1; }
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};
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private:
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uint32_t _bar[2] { 0, 0 }; /* contains two consecutive BARs for MEM64 */
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uint64_t _size { 0 };
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public:
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/* invalid resource */
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Resource() { }
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/* PORT or MEM32 resource */
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Resource(uint32_t bar, uint32_t size)
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: _bar{bar, 0}, _size(mem() ? Bar::mem_size(size, ~0) : Bar::port_size(size))
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{ }
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/* MEM64 resource */
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Resource(uint32_t bar0, uint32_t size0, uint32_t bar1, uint32_t size1)
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: _bar{bar0, bar1}, _size(Bar::mem_size(size0, size1))
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{ }
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bool valid() const { return !!_bar[0]; } /* no base address -> invalid */
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bool mem() const { return Bar::mem(_bar[0]); }
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uint64_t base() const { return mem() ? Bar::mem_address(_bar[0], _bar[1])
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: Bar::port_address(_bar[0]); }
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uint64_t size() const { return _size; }
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Platform::Device::Resource api_resource()
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{
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/*
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* The API type limits to 32-bit currently (defined in
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* spec/x86/platform_device/platform_device.h)
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*/
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return Device::Resource((unsigned)_bar[0], (unsigned)_size);
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}
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void print(Genode::Output &out) const
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{
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Genode::print(out, Genode::Hex_range(base(), size()));
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}
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};
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namespace Platform {
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class Device_config
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@ -44,7 +117,7 @@ namespace Platform {
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HEADER_CARD_BUS = 2
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};
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Device::Resource _resource[Device::NUM_RESOURCES];
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Platform::Pci::Resource _resource[Device::NUM_RESOURCES];
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bool _resource_id_is_valid(int resource_id)
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{
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@ -111,45 +184,62 @@ namespace Platform {
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return;
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}
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for (int i = 0; _resource_id_is_valid(i); i++) {
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/*
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* We iterate over all BARs but check for 64-bit memory
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* resources, which are stored in two consecutive BARs. The
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* MEM64 information is stored in the first resource entry and
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* the second resource is marked invalid.
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*/
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int i = 0;
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while (_resource_id_is_valid(i)) {
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using Pci::Resource;
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/* index of base-address register in configuration space */
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unsigned bar_idx = 0x10 + 4 * i;
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unsigned const bar_idx = 0x10 + 4 * i;
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/* read original base-address register value */
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unsigned orig_bar = pci_config->read(bus, device, function, bar_idx, Device::ACCESS_32BIT);
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/* read base-address register value */
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unsigned const bar_value =
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pci_config->read(bus, device, function, bar_idx, Device::ACCESS_32BIT);
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/* check for invalid resource */
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if (orig_bar == (unsigned)~0) {
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_resource[i] = Device::Resource(0, 0);
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/* skip invalid resource BARs */
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if (bar_value == ~0U || bar_value == 0U) {
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_resource[i] = Resource();
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++i;
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continue;
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}
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/*
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* Determine resource size by writing a magic value (all bits set)
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* to the base-address register. In response, the device clears a number
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* of lowest-significant bits corresponding to the resource size.
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* Finally, we write back the original value as assigned by the BIOS.
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* Determine resource size by writing a magic value (all
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* bits set) to the base-address register. In response, the
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* device clears a number of lowest-significant bits
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* corresponding to the resource size. Finally, we write
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* back the bar-address value as assigned by the BIOS.
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*/
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pci_config->write(bus, device, function, bar_idx, ~0, Device::ACCESS_32BIT);
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unsigned bar = pci_config->read(bus, device, function, bar_idx, Device::ACCESS_32BIT);
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pci_config->write(bus, device, function, bar_idx, orig_bar, Device::ACCESS_32BIT);
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unsigned const bar_size = pci_config->read(bus, device, function, bar_idx, Device::ACCESS_32BIT);
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pci_config->write(bus, device, function, bar_idx, bar_value, Device::ACCESS_32BIT);
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/*
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* Scan base-address-register value for the lowest set bit but
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* ignore the lower bits that are used to describe the resource type.
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* I/O resources use the lowest 3 bits, memory resources use the
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* lowest four bits for the resource description.
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*/
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unsigned start = (bar & 1) ? 3 : 4;
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unsigned size = 1 << start;
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for (unsigned bit = start; bit < 32; bit++, size += size)
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if (!Resource::Bar::mem64(bar_value)) {
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_resource[i] = Resource(bar_value, bar_size);
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++i;
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} else {
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/* also consume next BAR for MEM64 */
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unsigned const bar2_idx = bar_idx + 4;
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unsigned const bar2_value =
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pci_config->read(bus, device, function, bar2_idx, Device::ACCESS_32BIT);
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pci_config->write(bus, device, function, bar2_idx, ~0, Device::ACCESS_32BIT);
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unsigned const bar2_size =
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pci_config->read(bus, device, function, bar2_idx, Device::ACCESS_32BIT);
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pci_config->write(bus, device, function, bar2_idx, bar2_value, Device::ACCESS_32BIT);
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/* stop at the lowest-significant set bit */
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if (bar & (1 << bit))
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break;
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_resource[i] = Device::Resource(orig_bar, size);
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/* combine into first resource and mark second as invalid */
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_resource[i] = Resource(bar_value, bar_size,
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bar2_value, bar2_size);
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++i;
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_resource[i] = Resource();
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++i;
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}
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}
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}
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@ -192,11 +282,11 @@ namespace Platform {
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/**
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* Return resource description by resource ID
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*/
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Device::Resource resource(int resource_id)
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Platform::Pci::Resource resource(int resource_id)
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{
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/* return invalid resource if sanity check fails */
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if (!_resource_id_is_valid(resource_id))
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return Device::Resource(0, 0);
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return Platform::Pci::Resource();
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return _resource[resource_id];
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}
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@ -653,7 +653,7 @@ class Platform::Session_component : public Genode::Rpc_object<Session>
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int bus = 0, device = 0, function = -1;
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if (prev) {
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Device_config config = prev->config();
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Device_config config = prev->device_config();
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bus = config.bus_number();
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device = config.device_number();
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function = config.function_number();
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@ -736,9 +736,9 @@ class Platform::Session_component : public Genode::Rpc_object<Session>
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if (!device)
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return;
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unsigned const bus = device->config().bus_number();
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unsigned const dev = device->config().device_number();
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unsigned const func = device->config().function_number();
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unsigned const bus = device->device_config().bus_number();
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unsigned const dev = device->device_config().device_number();
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unsigned const func = device->device_config().function_number();
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if (bdf_in_use.get(Device_config::MAX_BUSES * bus +
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Device_config::MAX_DEVICES * dev +
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@ -753,7 +753,7 @@ class Platform::Session_component : public Genode::Rpc_object<Session>
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/* lookup device component for previous device */
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_env.ep().rpc_ep().apply(device_cap, lambda);
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if (device && device->config().valid())
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if (device && device->device_config().valid())
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destroy(_md_alloc, device);
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}
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@ -765,9 +765,9 @@ class Platform::Session_component : public Genode::Rpc_object<Session>
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return;
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try {
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addr_t const function = device->config().bus_number() * 32 * 8 +
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device->config().device_number() * 8 +
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device->config().function_number();
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addr_t const function = device->device_config().bus_number() * 32 * 8 +
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device->device_config().device_number() * 8 +
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device->device_config().function_number();
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addr_t const base_ecam = Dataspace_client(_pciconf.cap()).phys_addr();
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addr_t const base_offset = 0x1000UL * function;
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@ -775,12 +775,12 @@ class Platform::Session_component : public Genode::Rpc_object<Session>
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throw 1;
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for (Rmrr *r = Rmrr::list()->first(); r; r = r->next()) {
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Io_mem_dataspace_capability rmrr_cap = r->match(_env, device->config());
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Io_mem_dataspace_capability rmrr_cap = r->match(_env, device->device_config());
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if (rmrr_cap.valid())
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_device_pd.attach_dma_mem(rmrr_cap);
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}
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_device_pd.assign_pci(_pciconf.cap(), base_offset, device->config().bdf());
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_device_pd.assign_pci(_pciconf.cap(), base_offset, device->device_config().bdf());
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} catch (...) {
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Genode::error("assignment to device pd or of RMRR region failed");
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