From 6d8d6b5552222a24b0c6a511f1bdb7dce9617c39 Mon Sep 17 00:00:00 2001 From: Stefan Kalkowski Date: Wed, 22 May 2019 12:56:01 +0200 Subject: [PATCH] hw: disable alignment checking at earliest Fix #3370 --- repos/base-hw/src/bootstrap/spec/arm/cortex_a15_cpu.cc | 1 - repos/base-hw/src/bootstrap/spec/arm/cpu.cc | 1 - repos/base-hw/src/bootstrap/spec/arm/cpu.h | 2 -- repos/base-hw/src/bootstrap/spec/arm/crt0.s | 9 +++++++++ repos/base-hw/src/bootstrap/spec/arndale/platform.cc | 1 - repos/base-hw/src/bootstrap/spec/imx7d_sabre/platform.cc | 1 - 6 files changed, 9 insertions(+), 6 deletions(-) diff --git a/repos/base-hw/src/bootstrap/spec/arm/cortex_a15_cpu.cc b/repos/base-hw/src/bootstrap/spec/arm/cortex_a15_cpu.cc index aa1fc1d29..d3c304efb 100644 --- a/repos/base-hw/src/bootstrap/spec/arm/cortex_a15_cpu.cc +++ b/repos/base-hw/src/bootstrap/spec/arm/cortex_a15_cpu.cc @@ -62,7 +62,6 @@ void Bootstrap::Cpu::enable_mmu_and_caches(Genode::addr_t table) Sctlr::C::set(sctlr, 1); Sctlr::I::set(sctlr, 1); Sctlr::V::set(sctlr, 1); - Sctlr::A::set(sctlr, 0); Sctlr::M::set(sctlr, 1); Sctlr::Z::set(sctlr, 1); Sctlr::write(sctlr); diff --git a/repos/base-hw/src/bootstrap/spec/arm/cpu.cc b/repos/base-hw/src/bootstrap/spec/arm/cpu.cc index 90559b4a3..fba579ad5 100644 --- a/repos/base-hw/src/bootstrap/spec/arm/cpu.cc +++ b/repos/base-hw/src/bootstrap/spec/arm/cpu.cc @@ -40,7 +40,6 @@ void Bootstrap::Cpu::enable_mmu_and_caches(Genode::addr_t table) Sctlr::C::set(sctlr, 1); Sctlr::I::set(sctlr, 1); Sctlr::V::set(sctlr, 1); - Sctlr::A::set(sctlr, 0); Sctlr::M::set(sctlr, 1); Sctlr::Z::set(sctlr, 1); Sctlr::write(sctlr); diff --git a/repos/base-hw/src/bootstrap/spec/arm/cpu.h b/repos/base-hw/src/bootstrap/spec/arm/cpu.h index 0479fd849..72195f883 100644 --- a/repos/base-hw/src/bootstrap/spec/arm/cpu.h +++ b/repos/base-hw/src/bootstrap/spec/arm/cpu.h @@ -25,11 +25,9 @@ struct Bootstrap::Cpu : Hw::Arm_cpu static void init() { /* - * disable alignment checks and * set exception vector to 0xffff0000 */ access_t v = read(); - A::set(v, 0); V::set(v, 1); write(v); } diff --git a/repos/base-hw/src/bootstrap/spec/arm/crt0.s b/repos/base-hw/src/bootstrap/spec/arm/crt0.s index 377edbe59..ad507bdc8 100644 --- a/repos/base-hw/src/bootstrap/spec/arm/crt0.s +++ b/repos/base-hw/src/bootstrap/spec/arm/crt0.s @@ -37,6 +37,15 @@ 2: + /****************************** + ** Disable alignment checks ** + ******************************/ + + mrc p15, 0, r0, c1, c0, 0 + bic r0, r0, #2 /* clear A bit */ + mcr p15, 0, r0, c1, c0, 0 + + /***************************************************** ** Setup multiprocessor-aware kernel stack-pointer ** *****************************************************/ diff --git a/repos/base-hw/src/bootstrap/spec/arndale/platform.cc b/repos/base-hw/src/bootstrap/spec/arndale/platform.cc index 0f530085b..ded01f036 100644 --- a/repos/base-hw/src/bootstrap/spec/arndale/platform.cc +++ b/repos/base-hw/src/bootstrap/spec/arndale/platform.cc @@ -123,7 +123,6 @@ static inline void prepare_hypervisor(Genode::addr_t table) Cpu::Sctlr::C::set(sctlr, 1); Cpu::Sctlr::I::set(sctlr, 1); Cpu::Sctlr::V::set(sctlr, 1); - Cpu::Sctlr::A::set(sctlr, 0); Cpu::Sctlr::M::set(sctlr, 1); Cpu::Sctlr::Z::set(sctlr, 1); Cpu::Hsctlr::write(sctlr); diff --git a/repos/base-hw/src/bootstrap/spec/imx7d_sabre/platform.cc b/repos/base-hw/src/bootstrap/spec/imx7d_sabre/platform.cc index 076724140..706f0a745 100644 --- a/repos/base-hw/src/bootstrap/spec/imx7d_sabre/platform.cc +++ b/repos/base-hw/src/bootstrap/spec/imx7d_sabre/platform.cc @@ -256,7 +256,6 @@ static inline void prepare_hypervisor(Genode::addr_t table) Cpu::Sctlr::C::set(sctlr, 1); Cpu::Sctlr::I::set(sctlr, 1); Cpu::Sctlr::V::set(sctlr, 1); - Cpu::Sctlr::A::set(sctlr, 0); Cpu::Sctlr::M::set(sctlr, 1); Cpu::Sctlr::Z::set(sctlr, 1); Cpu::Hsctlr::write(sctlr);