diff --git a/repos/dde_linux/src/include/lx_emul/mmio.h b/repos/dde_linux/src/include/lx_emul/mmio.h index 0db1ff469..3fe823ab5 100644 --- a/repos/dde_linux/src/include/lx_emul/mmio.h +++ b/repos/dde_linux/src/include/lx_emul/mmio.h @@ -19,12 +19,15 @@ ** asm-generic/io.h ** **********************/ -#define writeq(value, addr) (*(volatile uint64_t *)(addr) = (value)) -#define writel(value, addr) (*(volatile uint32_t *)(addr) = (value)) -#define writew(value, addr) (*(volatile uint16_t *)(addr) = (value)) -#define writeb(value, addr) (*(volatile uint8_t *)(addr) = (value)) +#define iowmb dma_wmb +#define iormb dma_rmb -#define readq(addr) (*(volatile uint64_t *)(addr)) -#define readl(addr) (*(volatile uint32_t *)(addr)) -#define readw(addr) (*(volatile uint16_t *)(addr)) -#define readb(addr) (*(volatile uint8_t *)(addr)) +#define writeq(value, addr) ({ iowmb(); *(volatile uint64_t *)(addr) = (value); }) +#define writel(value, addr) ({ iowmb(); *(volatile uint32_t *)(addr) = (value); }) +#define writew(value, addr) ({ iowmb(); *(volatile uint16_t *)(addr) = (value); }) +#define writeb(value, addr) ({ iowmb(); *(volatile uint8_t *)(addr) = (value); }) + +#define readq(addr) ({ uint64_t const r = *(volatile uint64_t *)(addr); iormb(); r; }) +#define readl(addr) ({ uint32_t const r = *(volatile uint32_t *)(addr); iormb(); r; }) +#define readw(addr) ({ uint16_t const r = *(volatile uint16_t *)(addr); iormb(); r; }) +#define readb(addr) ({ uint8_t const r = *(volatile uint8_t *)(addr); iormb(); r; }) diff --git a/repos/dde_linux/src/include/spec/arm_64/lx_emul/barrier.h b/repos/dde_linux/src/include/spec/arm_64/lx_emul/barrier.h index 76f0e6d85..215521c01 100644 --- a/repos/dde_linux/src/include/spec/arm_64/lx_emul/barrier.h +++ b/repos/dde_linux/src/include/spec/arm_64/lx_emul/barrier.h @@ -19,6 +19,9 @@ #define rmb() mb() #define wmb() asm volatile ("dsb st": : :"memory") +#define dma_wmb() __asm__ __volatile__ ("dmb oshst" : : : "memory") +#define dma_rmb() __asm__ __volatile__ ("dmb oshld" : : : "memory") + /* * This is the "safe" implementation as needed for a configuration * with bufferable DMA memory and SMP enabled. diff --git a/repos/dde_linux/src/include/spec/arm_v6/lx_emul/barrier.h b/repos/dde_linux/src/include/spec/arm_v6/lx_emul/barrier.h index 221eb6536..a754f14d5 100644 --- a/repos/dde_linux/src/include/spec/arm_v6/lx_emul/barrier.h +++ b/repos/dde_linux/src/include/spec/arm_v6/lx_emul/barrier.h @@ -19,6 +19,9 @@ #define rmb() mb() #define wmb() asm volatile ("": : :"memory") +#define dma_wmb() barrier() +#define dma_rmb() barrier() + /* * This is the "safe" implementation as needed for a configuration * with SMP enabled. diff --git a/repos/dde_linux/src/include/spec/arm_v7/lx_emul/barrier.h b/repos/dde_linux/src/include/spec/arm_v7/lx_emul/barrier.h index 6f2b80520..ccc7957f0 100644 --- a/repos/dde_linux/src/include/spec/arm_v7/lx_emul/barrier.h +++ b/repos/dde_linux/src/include/spec/arm_v7/lx_emul/barrier.h @@ -19,6 +19,9 @@ #define rmb() mb() #define wmb() asm volatile ("dsb st": : :"memory") +#define dma_wmb() barrier() +#define dma_rmb() barrier() + /* * This is the "safe" implementation as needed for a configuration * with bufferable DMA memory and SMP enabled. diff --git a/repos/dde_linux/src/include/spec/x86/lx_emul/barrier.h b/repos/dde_linux/src/include/spec/x86/lx_emul/barrier.h index d0575003d..4813ef079 100644 --- a/repos/dde_linux/src/include/spec/x86/lx_emul/barrier.h +++ b/repos/dde_linux/src/include/spec/x86/lx_emul/barrier.h @@ -7,6 +7,9 @@ #define rmb() asm volatile ("lfence": : :"memory") #define wmb() asm volatile ("sfence": : :"memory") +#define dma_wmb() barrier() +#define dma_rmb() barrier() + /* * This is the "safe" implementation as needed for a configuration * with SMP enabled.