hw_zynq: refactor specs

This is a generalisation approach of the hw_zynq target. As the boards
typically use UART1 instead of UART0 (used by qemu), we have to
distinguish between those. Moreover, in general hw_zynq does not imply
zynq_qemu anymore, so that the support of particular boards can be
placed in third-party or community repositories (e.g. Genode world).

Fixes #1926
This commit is contained in:
Johannes Schlatow 2016-03-24 18:32:15 +01:00 committed by Christian Helmuth
parent 05e09a6116
commit 5b12034531
9 changed files with 27 additions and 10 deletions

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@ -6,7 +6,6 @@
# add include paths
INC_DIR += $(REP_DIR)/src/core/include/spec/zynq
INC_DIR += $(REP_DIR)/src/core/include/spec/xilinx
# add C++ sources
SRC_CC += platform_services.cc

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@ -4,5 +4,9 @@
# \date 2014-12-15
#
# add include paths
INC_DIR += $(REP_DIR)/src/core/include/spec/xilinx_uartps_0
INC_DIR += $(REP_DIR)/src/core/include/spec/zynq_qemu
# include less specific configuration
include $(REP_DIR)/lib/mk/spec/zynq/core.inc

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@ -5,7 +5,7 @@
#
# denote which specs are also fulfilled by this spec
SPECS += hw zynq_qemu
SPECS += hw
# configure multiprocessor mode
NR_OF_CPUS = 1
@ -15,4 +15,3 @@ LD_TEXT_ADDR ?= 0x00100000
# include implied specs
include $(call select_from_repositories,mk/spec/hw.mk)
include $(call select_from_repositories,mk/spec/zynq_qemu.mk)

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@ -13,15 +13,21 @@
* under the terms of the GNU General Public License version 2.
*/
#ifndef _CORE__INCLUDE__SPEC__ZYNQ__BOARD_H_
#define _CORE__INCLUDE__SPEC__ZYNQ__BOARD_H_
#ifndef _CORE__INCLUDE__SPEC__ZYNQ_QEMU__BOARD_H_
#define _CORE__INCLUDE__SPEC__ZYNQ_QEMU__BOARD_H_
/* core includes */
#include <spec/cortex_a9/board_support.h>
namespace Genode
{
using Board = Cortex_a9::Board;
struct Board : Cortex_a9::Board
{
enum {
KERNEL_UART_BASE = UART_0_MMIO_BASE,
KERNEL_UART_SIZE = UART_SIZE,
};
};
}
#endif /* _CORE__INCLUDE__SPEC__ZYNQ__BOARD_H_ */
#endif /* _CORE__INCLUDE__SPEC__ZYNQ_QEMU__BOARD_H_ */

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@ -57,7 +57,7 @@ Native_region * Platform::_core_only_mmio_regions(unsigned const i)
Board::CORTEX_A9_PRIVATE_MEM_SIZE },
/* core UART */
{ Board::UART_0_MMIO_BASE, Board::UART_SIZE },
{ Board::KERNEL_UART_BASE, Board::KERNEL_UART_SIZE },
/* L2 cache controller */
{ Board::PL310_MMIO_BASE, Board::PL310_MMIO_SIZE }

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@ -1,7 +1,7 @@
#
# Pull in CPU specifics
#
SPECS += zynq cadence_gem xilinx
SPECS += zynq cadence_gem
REP_INC_DIR += include/spec/zynq_qemu
REP_INC_DIR += include/spec/xilinx

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@ -4,4 +4,10 @@ REPOSITORIES += $(GENODE_DIR)/repos/base-hw
## Kernel-specific run tool configuration
##
RUN_OPT = --include boot_dir/hw --include power_on/qemu --include log/qemu
RUN_OPT = --include boot_dir/hw
## Set RUN_OPT to exectute this on Qemu
RUN_OPT += --include power_on/qemu --include log/qemu
## Set RUN_OPT to execute this on actual hardware.
#RUN_OPT += --include image/uboot

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@ -252,6 +252,9 @@ hw_rpi::
hw_zynq::
@echo "SPECS = genode hw_zynq" > $(BUILD_DIR)/etc/specs.conf
@echo "SPECS += perf_counter" >> $(BUILD_DIR)/etc/specs.conf
@echo "## By default, hw_zynq is executed on Qemu" >> $(BUILD_DIR)/etc/specs.conf
@echo "SPECS += zynq_qemu" >> $(BUILD_DIR)/etc/specs.conf
hw_odroid_xu::
@echo "SPECS = genode hw_odroid_xu" > $(BUILD_DIR)/etc/specs.conf