From 58db6542f87aecf44482cd354ebb673d73b5e924 Mon Sep 17 00:00:00 2001
From: Stefan Kalkowski <stefan.kalkowski@genode-labs.com>
Date: Fri, 21 Feb 2020 11:35:43 +0100
Subject: [PATCH] hw: check for security extension support in GICv2

Ref #3638
---
 repos/base-hw/src/bootstrap/spec/arm/gicv2.cc | 10 ++++++----
 repos/base-hw/src/include/hw/spec/arm/gicv2.h |  7 +++++--
 2 files changed, 11 insertions(+), 6 deletions(-)

diff --git a/repos/base-hw/src/bootstrap/spec/arm/gicv2.cc b/repos/base-hw/src/bootstrap/spec/arm/gicv2.cc
index 026a9a945..f3f483a48 100644
--- a/repos/base-hw/src/bootstrap/spec/arm/gicv2.cc
+++ b/repos/base-hw/src/bootstrap/spec/arm/gicv2.cc
@@ -20,6 +20,8 @@ Hw::Gicv2::Gicv2()
   _max_irq(_distr.max_irq())
 {
 	static bool distributor_initialized = false;
+	bool use_group_1 = Board::NON_SECURE &&
+	                   _distr.read<Distributor::Typer::Security_extension>();
 
 	if (!distributor_initialized) {
 		distributor_initialized = true;
@@ -29,7 +31,7 @@ Hw::Gicv2::Gicv2()
 
 		/* configure every shared peripheral interrupt */
 		for (unsigned i = min_spi; i <= _max_irq; i++) {
-			if (Board::NON_SECURE) {
+			if (use_group_1) {
 				_distr.write<Distributor::Igroupr::Group_status>(1, i);
 			}
 			_distr.write<Distributor::Icfgr::Edge_triggered>(0, i);
@@ -39,7 +41,7 @@ Hw::Gicv2::Gicv2()
 
 		/* enable device */
 		Distributor::Ctlr::access_t v = 0;
-		if (Board::NON_SECURE) {
+		if (use_group_1) {
 			Distributor::Ctlr::Enable_grp0::set(v, 1);
 			Distributor::Ctlr::Enable_grp1::set(v, 1);
 		} else {
@@ -48,7 +50,7 @@ Hw::Gicv2::Gicv2()
 		_distr.write<Distributor::Ctlr>(v);
 	}
 
-	if (Board::NON_SECURE) {
+	if (use_group_1) {
 		_cpui.write<Cpu_interface::Ctlr>(0);
 
 		/* mark software-generated IRQs as being non-secure */
@@ -64,7 +66,7 @@ Hw::Gicv2::Gicv2()
 
 	/* enable device */
 	Cpu_interface::Ctlr::access_t v = 0;
-	if (Board::NON_SECURE) {
+	if (use_group_1) {
 		Cpu_interface::Ctlr::Enable_grp0::set(v, 1);
 		Cpu_interface::Ctlr::Enable_grp1::set(v, 1);
 		Cpu_interface::Ctlr::Fiq_en::set(v, 1);
diff --git a/repos/base-hw/src/include/hw/spec/arm/gicv2.h b/repos/base-hw/src/include/hw/spec/arm/gicv2.h
index 0a72bc844..97b5a532b 100644
--- a/repos/base-hw/src/include/hw/spec/arm/gicv2.h
+++ b/repos/base-hw/src/include/hw/spec/arm/gicv2.h
@@ -43,8 +43,11 @@ class Hw::Gicv2
 			/**
 			 * Controller type register
 			 */
-			struct Typer : Register<0x004, 32> {
-				struct It_lines_number : Bitfield<0,5> { }; };
+			struct Typer : Register<0x004, 32>
+			{
+				struct It_lines_number    : Bitfield<0,5>  { };
+				struct Security_extension : Bitfield<10,1> { };
+			};
 
 			/**
 			 * Interrupt group register