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vmm: fix GIC interrupt register bit shifts 

Ref #3620
This commit is contained in:
Stefan Kalkowski 2020-01-23 14:55:47 +01:00 committed by Christian Helmuth
parent a7a9855493
commit 55c3eb7c14
2 changed files with 4 additions and 4 deletions
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4
repos/os/src/server/vmm/spec/arm_v8/gic.h
View File

@ -377,11 +377,11 @@ class Vmm::Gic : public Vmm::Mmio_device
struct Gicd_icfgr : Irq_reg
{
Register read(Irq & irq) { return irq.level() ? 0 : 1; }
Register read(Irq & irq) { return irq.level() ? 0 : 2; }
void write(Irq & irq, Register v) { irq.level(!v); }
Gicd_icfgr()
: Irq_reg("GICD_ICFGR", Mmio_register::RW, 0xc00, 8, 1024) {}
: Irq_reg("GICD_ICFGR", Mmio_register::RW, 0xc00, 2, 1024) {}
} _icfgr;
struct Gicd_sgir : Genode::Register<32>, Mmio_register

4
repos/os/src/server/vmm/spec/arm_v8/gicv2.cc
View File

@ -202,7 +202,7 @@ Register Gic::Irq_reg::read(Address_range & access, Cpu & cpu)
Register bits_per_irq = size * 8 / irq_count;
for (unsigned i = (access.start * 8) / bits_per_irq;
i < ((access.start+access.size) * 8) / bits_per_irq; i++)
ret |= read(cpu.gic().irq(i)) << (i % 32/bits_per_irq);
ret |= read(cpu.gic().irq(i)) << ((i % (32/bits_per_irq) * bits_per_irq));
return ret;
}
@ -213,7 +213,7 @@ void Gic::Irq_reg::write(Address_range & access, Cpu & cpu, Register value)
Register irq_value_mask = (1<<bits_per_irq) - 1;
for (unsigned i = (access.start * 8) / bits_per_irq;
i < ((access.start+access.size) * 8) / bits_per_irq; i++)
write(cpu.gic().irq(i), (value >> (i % 32/bits_per_irq))
write(cpu.gic().irq(i), (value >> ((i % (32/bits_per_irq))*bits_per_irq))
& irq_value_mask);
}