Turn OMAP4 framebufer driver into Genode service
This commit is contained in:
Norman Feske
parent
2c8dbb3b04
commit
53f55cdfa9
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@ -0,0 +1,246 @@
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/*
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* \brief Frame-buffer driver for the OMAP4430 display-subsystem (HDMI)
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* \author Norman Feske
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* \author Martin Stein
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* \date 2012-06-01
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*/
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/*
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* Copyright (C) 2012 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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/* Genode includes */
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#include <os/attached_io_mem_dataspace.h>
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#include <timer_session/connection.h>
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/* local includes */
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#include <mmio.h>
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#include <dss.h>
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#include <dispc.h>
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#include <hdmi.h>
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namespace Framebuffer {
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using namespace Genode;
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class Driver;
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}
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class Framebuffer::Driver
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{
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public:
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enum Mode { MODE_1024_768 };
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enum Format { FORMAT_RGB565 };
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private:
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struct Timer_delayer : Timer::Connection, Delayer
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{
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/**
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* Implementation of 'Delayer' interface
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*/
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void usleep(unsigned us)
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{
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/* polling */
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if (us == 0)
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return;
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unsigned ms = us / 1000;
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if (ms == 0)
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ms = 1;
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Timer::Connection::msleep(ms);
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}
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} _delayer;
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/* memory map */
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enum {
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DSS_MMIO_BASE = 0x58000000,
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DSS_MMIO_SIZE = 0x00001000,
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DISPC_MMIO_BASE = 0x58001000,
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DISPC_MMIO_SIZE = 0x1000,
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HDMI_MMIO_BASE = 0x58006000,
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HDMI_MMIO_SIZE = 0x1000,
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};
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/* display sub system registers */
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Attached_io_mem_dataspace _dss_mmio;
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Dss _dss;
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/* display controller registers */
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Attached_io_mem_dataspace _dispc_mmio;
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Dispc _dispc;
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/* HDMI controller registers */
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Attached_io_mem_dataspace _hdmi_mmio;
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Hdmi _hdmi;
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public:
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Driver();
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static size_t bytes_per_pixel(Format format)
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{
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switch (format) {
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case FORMAT_RGB565: return 2;
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}
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return 0;
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}
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static size_t width(Mode mode)
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{
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switch (mode) {
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case MODE_1024_768: return 1024;
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}
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return 0;
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}
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static size_t height(Mode mode)
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{
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switch (mode) {
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case MODE_1024_768: return 768;
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}
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return 0;
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}
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static size_t buffer_size(Mode mode, Format format)
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{
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return bytes_per_pixel(format)*width(mode)*height(mode);
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}
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bool init(Mode mode, Format format, addr_t phys_base);
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};
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Framebuffer::Driver::Driver()
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:
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_dss_mmio(DSS_MMIO_BASE, DSS_MMIO_SIZE),
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_dss((addr_t)_dss_mmio.local_addr<void>()),
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_dispc_mmio(DISPC_MMIO_BASE, DISPC_MMIO_SIZE),
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_dispc((addr_t)_dispc_mmio.local_addr<void>()),
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_hdmi_mmio(HDMI_MMIO_BASE, HDMI_MMIO_SIZE),
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_hdmi((addr_t)_hdmi_mmio.local_addr<void>())
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{ }
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bool Framebuffer::Driver::init(Framebuffer::Driver::Mode mode,
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Framebuffer::Driver::Format format,
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Framebuffer::addr_t phys_base)
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{
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/* enable display core clock and set divider to 1 */
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_dispc.write<Dispc::Divisor::Lcd>(1);
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_dispc.write<Dispc::Divisor::Enable>(1);
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/* set load mode */
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_dispc.write<Dispc::Config1::Load_mode>(Dispc::Config1::Load_mode::DATA_EVERY_FRAME);
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_hdmi.write<Hdmi::Video_cfg::Start>(0);
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if (!_hdmi.issue_pwr_pll_command(Hdmi::Pwr_ctrl::ALL_OFF, _delayer)) {
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PERR("Powering off HDMI timed out\n");
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return false;
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}
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if (!_hdmi.issue_pwr_pll_command(Hdmi::Pwr_ctrl::BOTH_ON_ALL_CLKS, _delayer)) {
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PERR("Powering on HDMI timed out\n");
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return false;
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}
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if (!_hdmi.reset_pll(_delayer)) {
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PERR("Resetting HDMI PLL timed out\n");
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return false;
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}
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_hdmi.write<Hdmi::Pll_control::Mode>(Hdmi::Pll_control::Mode::MANUAL);
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_hdmi.write<Hdmi::Cfg1::Regm>(270);
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_hdmi.write<Hdmi::Cfg1::Regn>(15);
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_hdmi.write<Hdmi::Cfg2::Highfreq_div_by_2>(0);
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_hdmi.write<Hdmi::Cfg2::Refen>(1);
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_hdmi.write<Hdmi::Cfg2::Clkinen>(0);
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_hdmi.write<Hdmi::Cfg2::Refsel>(3);
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_hdmi.write<Hdmi::Cfg2::Freq_divider>(2);
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_hdmi.write<Hdmi::Cfg4::Regm2>(1);
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_hdmi.write<Hdmi::Cfg4::Regmf>(0x35555);
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if (!_hdmi.pll_go(_delayer)) {
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PERR("HDMI PLL GO timed out");
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return false;
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}
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if (!_hdmi.issue_pwr_phy_command(Hdmi::Pwr_ctrl::LDOON, _delayer)) {
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PERR("HDMI Phy power on timed out");
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return false;
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}
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_hdmi.write<Hdmi::Txphy_tx_ctrl::Freqout>(1);
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_hdmi.write<Hdmi::Txphy_digital_ctrl>(0xf0000000);
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if (!_hdmi.issue_pwr_phy_command(Hdmi::Pwr_ctrl::TXON, _delayer)) {
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PERR("HDMI Txphy power on timed out");
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return false;
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}
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_hdmi.write<Hdmi::Video_timing_h::Bp>(160);
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_hdmi.write<Hdmi::Video_timing_h::Fp>(24);
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_hdmi.write<Hdmi::Video_timing_h::Sw>(136);
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_hdmi.write<Hdmi::Video_timing_v::Bp>(29);
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_hdmi.write<Hdmi::Video_timing_v::Fp>(3);
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_hdmi.write<Hdmi::Video_timing_v::Sw>(6);
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_hdmi.write<Hdmi::Video_cfg::Packing_mode>(Hdmi::Video_cfg::Packing_mode::PACK_24B);
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_hdmi.write<Hdmi::Video_size::X>(width(mode));
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_hdmi.write<Hdmi::Video_size::Y>(height(mode));
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_hdmi.write<Hdmi::Video_cfg::Vsp>(0);
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_hdmi.write<Hdmi::Video_cfg::Hsp>(0);
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_hdmi.write<Hdmi::Video_cfg::Interlacing>(0);
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_hdmi.write<Hdmi::Video_cfg::Tm>(1);
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_dss.write<Dss::Ctrl::Venc_hdmi_switch>(Dss::Ctrl::Venc_hdmi_switch::HDMI);
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_dispc.write<Dispc::Size_tv::Width>(width(mode) - 1);
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_dispc.write<Dispc::Size_tv::Height>(height(mode) - 1);
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_hdmi.write<Hdmi::Video_cfg::Start>(1);
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Dispc::Gfx_attributes::access_t pixel_format = 0;
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switch (format) {
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case FORMAT_RGB565: pixel_format = Dispc::Gfx_attributes::Format::RGB16; break;
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}
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_dispc.write<Dispc::Gfx_attributes::Format>(pixel_format);
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_dispc.write<Dispc::Gfx_ba1>(phys_base);
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_dispc.write<Dispc::Gfx_size::Sizex>(width(mode) - 1);
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_dispc.write<Dispc::Gfx_size::Sizey>(height(mode) - 1);
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_dispc.write<Dispc::Global_buffer>(0x6d2240);
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_dispc.write<Dispc::Gfx_attributes::Enable>(1);
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_dispc.write<Dispc::Gfx_attributes::Channelout>(Dispc::Gfx_attributes::Channelout::TV);
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_dispc.write<Dispc::Gfx_attributes::Channelout2>(Dispc::Gfx_attributes::Channelout2::PRIMARY_LCD);
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_dispc.write<Dispc::Control1::Tv_enable>(1);
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_dispc.write<Dispc::Control1::Go_tv>(1);
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if (!_dispc.wait_for<Dispc::Control1::Go_tv>(Dispc::Control1::Go_tv::HW_UPDATE_DONE, _delayer)) {
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PERR("Go_tv timed out");
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return false;
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}
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return true;
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}
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@ -1,8 +1,7 @@
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/*
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* \brief Frame-buffer driver for the OMAP4430 display-subsystem (HDMI)
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* \author Norman Feske
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* \author Martin Stein
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* \date 2012-06-01
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* \date 2012-06-21
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*/
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/*
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@ -14,8 +13,6 @@
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/* Genode includes */
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#include <framebuffer_session/framebuffer_session.h>
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#include <os/attached_io_mem_dataspace.h>
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#include <timer_session/connection.h>
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#include <cap_session/connection.h>
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#include <dataspace/client.h>
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#include <base/printf.h>
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@ -23,186 +20,130 @@
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#include <root/component.h>
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/* local includes */
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#include <mmio.h>
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#include <dss.h>
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#include <dispc.h>
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#include <hdmi.h>
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#include <driver.h>
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/**
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* Root interface that hands out a statically created session
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*/
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template <typename SESSION_TYPE>
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class Static_root : public Genode::Rpc_object<Genode::Typed_root<SESSION_TYPE> >
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{
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private:
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typedef Genode::Capability<SESSION_TYPE> Session_capability;
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Session_capability _session;
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public:
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/**
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* Constructor
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*
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* \param session session to be provided to the client
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*/
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Static_root(Session_capability session) : _session(session) { }
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/********************
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** Root interface **
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********************/
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Genode::Session_capability session(Genode::Root::Session_args const &args) { return _session; }
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void upgrade(Genode::Session_capability, Genode::Root::Upgrade_args const &) { }
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void close(Genode::Session_capability) { }
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};
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namespace Framebuffer {
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using namespace Genode;
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class Session_component;
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};
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class Framebuffer::Session_component : public Genode::Rpc_object<Framebuffer::Session>
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{
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private:
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Driver::Mode _mode;
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Driver::Format _format;
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size_t _size;
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Dataspace_capability _ds;
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addr_t _phys_base;
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/**
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* Convert Driver::Format to Framebuffer::Mode::Format
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*/
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static Mode::Format _convert_format(Driver::Format driver_format)
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{
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switch (driver_format) {
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case Driver::FORMAT_RGB565: return Mode::RGB565;
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}
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return Mode::INVALID;
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}
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public:
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Session_component(Driver &driver)
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:
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_mode(Driver::MODE_1024_768),
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_format(Driver::FORMAT_RGB565),
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_size(Driver::buffer_size(_mode, _format)),
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_ds(env()->ram_session()->alloc(_size, false)),
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_phys_base(Dataspace_client(_ds).phys_addr())
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{
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if (!driver.init(_mode, _format, _phys_base)) {
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PERR("Could not initialize display");
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struct Could_not_initialize_display : Exception { };
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throw Could_not_initialize_display();
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}
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}
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/************************************
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** Framebuffer::Session interface **
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************************************/
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Dataspace_capability dataspace() { return _ds; }
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void release() { }
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Mode mode() const
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{
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return Mode(Driver::width(_mode),
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Driver::height(_mode),
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_convert_format(_format));
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}
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void mode_sigh(Genode::Signal_context_capability) { }
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void refresh(int, int, int, int) { }
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};
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int main(int, char **)
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{
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using namespace Genode;
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printf("--- omap44xx framebuffer driver ---\n");
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using namespace Framebuffer;
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struct Timer_delayer : Timer::Connection, Delayer
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{
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/**
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* Implementation of 'Delayer' interface
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*/
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void usleep(unsigned us)
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{
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/* polling */
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if (us == 0)
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return;
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unsigned ms = us / 1000;
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if (ms == 0)
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ms = 1;
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Timer::Connection::msleep(ms);
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}
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};
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static Timer_delayer delayer;
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/* memory map */
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enum {
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DSS_MMIO_BASE = 0x58000000,
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DSS_MMIO_SIZE = 0x00001000,
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DISPC_MMIO_BASE = 0x58001000,
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DISPC_MMIO_SIZE = 0x1000,
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HDMI_MMIO_BASE = 0x58006000,
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HDMI_MMIO_SIZE = 0x1000,
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};
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static Driver driver;
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/*
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* Obtain MMIO resources
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* Initialize server entry point
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*/
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enum { STACK_SIZE = 4096 };
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static Cap_connection cap;
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static Rpc_entrypoint ep(&cap, STACK_SIZE, "fb_ep");
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/* display sub system registers */
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Attached_io_mem_dataspace dss_mmio(DSS_MMIO_BASE, DSS_MMIO_SIZE);
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Dss dss((addr_t)dss_mmio.local_addr<void>());
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/*
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* Let the entry point serve the framebuffer session and root interfaces
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*/
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static Session_component fb_session(driver);
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static Static_root<Framebuffer::Session> fb_root(ep.manage(&fb_session));
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/* display controller registers */
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Attached_io_mem_dataspace dispc_mmio(DISPC_MMIO_BASE, DISPC_MMIO_SIZE);
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Dispc dispc((addr_t)dispc_mmio.local_addr<void>());
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/*
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* Announce service
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*/
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env()->parent()->announce(ep.manage(&fb_root));
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/* HDMI controller registers */
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Attached_io_mem_dataspace hdmi_mmio(HDMI_MMIO_BASE, HDMI_MMIO_SIZE);
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Hdmi hdmi((addr_t)hdmi_mmio.local_addr<void>());
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/* enable display core clock and set divider to 1 */
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dispc.write<Dispc::Divisor::Lcd>(1);
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dispc.write<Dispc::Divisor::Enable>(1);
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/* set load mode */
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dispc.write<Dispc::Config1::Load_mode>(Dispc::Config1::Load_mode::DATA_EVERY_FRAME);
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hdmi.write<Hdmi::Video_cfg::Start>(0);
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if (!hdmi.issue_pwr_pll_command(Hdmi::Pwr_ctrl::ALL_OFF, delayer)) {
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PERR("Powering off HDMI timed out\n");
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return 1;
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}
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if (!hdmi.issue_pwr_pll_command(Hdmi::Pwr_ctrl::BOTH_ON_ALL_CLKS, delayer)) {
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PERR("Powering on HDMI timed out\n");
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return 2;
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}
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if (!hdmi.reset_pll(delayer)) {
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PERR("Resetting HDMI PLL timed out\n");
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return 3;
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}
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hdmi.write<Hdmi::Pll_control::Mode>(Hdmi::Pll_control::Mode::MANUAL);
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hdmi.write<Hdmi::Cfg1::Regm>(270);
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hdmi.write<Hdmi::Cfg1::Regn>(15);
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hdmi.write<Hdmi::Cfg2::Highfreq_div_by_2>(0);
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hdmi.write<Hdmi::Cfg2::Refen>(1);
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hdmi.write<Hdmi::Cfg2::Clkinen>(0);
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hdmi.write<Hdmi::Cfg2::Refsel>(3);
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hdmi.write<Hdmi::Cfg2::Freq_divider>(2);
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hdmi.write<Hdmi::Cfg4::Regm2>(1);
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hdmi.write<Hdmi::Cfg4::Regmf>(0x35555);
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if (!hdmi.pll_go(delayer)) {
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PERR("HDMI PLL GO timed out");
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return 4;
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}
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if (!hdmi.issue_pwr_phy_command(Hdmi::Pwr_ctrl::LDOON, delayer)) {
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PERR("HDMI Phy power on timed out");
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return 5;
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}
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hdmi.write<Hdmi::Txphy_tx_ctrl::Freqout>(1);
|
||||
hdmi.write<Hdmi::Txphy_digital_ctrl>(0xf0000000);
|
||||
|
||||
if (!hdmi.issue_pwr_phy_command(Hdmi::Pwr_ctrl::TXON, delayer)) {
|
||||
PERR("HDMI Txphy power on timed out");
|
||||
return 6;
|
||||
}
|
||||
|
||||
hdmi.write<Hdmi::Video_timing_h::Bp>(160);
|
||||
hdmi.write<Hdmi::Video_timing_h::Fp>(24);
|
||||
hdmi.write<Hdmi::Video_timing_h::Sw>(136);
|
||||
|
||||
hdmi.write<Hdmi::Video_timing_v::Bp>(29);
|
||||
hdmi.write<Hdmi::Video_timing_v::Fp>(3);
|
||||
hdmi.write<Hdmi::Video_timing_v::Sw>(6);
|
||||
|
||||
hdmi.write<Hdmi::Video_cfg::Packing_mode>(Hdmi::Video_cfg::Packing_mode::PACK_24B);
|
||||
|
||||
hdmi.write<Hdmi::Video_size::X>(1024);
|
||||
hdmi.write<Hdmi::Video_size::Y>(768);
|
||||
|
||||
hdmi.write<Hdmi::Video_cfg::Vsp>(0);
|
||||
hdmi.write<Hdmi::Video_cfg::Hsp>(0);
|
||||
hdmi.write<Hdmi::Video_cfg::Interlacing>(0);
|
||||
hdmi.write<Hdmi::Video_cfg::Tm>(1);
|
||||
|
||||
dss.write<Dss::Ctrl::Venc_hdmi_switch>(Dss::Ctrl::Venc_hdmi_switch::HDMI);
|
||||
|
||||
dispc.write<Dispc::Size_tv::Width>(1024 - 1);
|
||||
dispc.write<Dispc::Size_tv::Height>(768 - 1);
|
||||
|
||||
hdmi.write<Hdmi::Video_cfg::Start>(1);
|
||||
|
||||
dispc.write<Dispc::Gfx_attributes::Format>(Dispc::Gfx_attributes::Format::RGB16);
|
||||
|
||||
typedef Genode::uint16_t pixel_t;
|
||||
|
||||
Genode::Dataspace_capability fb_ds =
|
||||
Genode::env()->ram_session()->alloc(1024*768*sizeof(pixel_t), false);
|
||||
|
||||
Genode::addr_t fb_phys_base = Genode::Dataspace_client(fb_ds).phys_addr();
|
||||
|
||||
dispc.write<Dispc::Gfx_ba1>(fb_phys_base);
|
||||
|
||||
dispc.write<Dispc::Gfx_size::Sizex>(1024 - 1);
|
||||
dispc.write<Dispc::Gfx_size::Sizey>(768 - 1);
|
||||
|
||||
dispc.write<Dispc::Global_buffer>(0x6d2240);
|
||||
dispc.write<Dispc::Gfx_attributes::Enable>(1);
|
||||
|
||||
dispc.write<Dispc::Gfx_attributes::Channelout>(Dispc::Gfx_attributes::Channelout::TV);
|
||||
dispc.write<Dispc::Gfx_attributes::Channelout2>(Dispc::Gfx_attributes::Channelout2::PRIMARY_LCD);
|
||||
|
||||
dispc.write<Dispc::Control1::Tv_enable>(1);
|
||||
|
||||
dispc.write<Dispc::Control1::Go_tv>(1);
|
||||
|
||||
if (!dispc.wait_for<Dispc::Control1::Go_tv>(Dispc::Control1::Go_tv::HW_UPDATE_DONE, delayer)) {
|
||||
PERR("Go_tv timed out");
|
||||
return 6;
|
||||
}
|
||||
|
||||
pixel_t *fb_local_base = Genode::env()->rm_session()->attach(fb_ds);
|
||||
for (unsigned y = 0; y < 768; y++) {
|
||||
for (unsigned x = 0; x < 1024; x++) {
|
||||
fb_local_base[y*1024 + x] = (x & 0x1f);
|
||||
fb_local_base[y*1024 + x] |= ((y) & 0x1f) << 11;
|
||||
fb_local_base[y*1024 + x] |= ((x + y) & 0x3f) << 5;
|
||||
}
|
||||
}
|
||||
|
||||
PINF("done");
|
||||
sleep_forever();
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue