From 4946f213026246fb2990c129ce60f31c6223a094 Mon Sep 17 00:00:00 2001 From: Adrian-Ken Rueegsegger Date: Sat, 21 Feb 2015 01:58:14 +0100 Subject: [PATCH] hw_x86_64: Set base address and limit of TSS descriptor The limit is set to match the TSS size - 1 and the base address is hardcoded to the *current* address of the TSS instance (0x3a1100). TODO: Set the base address using the 'tss' label. If the TSS descriptor format were not so utterly unusable this would be straightforward. Changes to the code that indirectly lead to a different location of the tss result in #GP since the base address will be invalid. --- repos/base-hw/src/core/spec/x86_64/kernel/crt0.s | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/repos/base-hw/src/core/spec/x86_64/kernel/crt0.s b/repos/base-hw/src/core/spec/x86_64/kernel/crt0.s index 8c696697d..a06028492 100644 --- a/repos/base-hw/src/core/spec/x86_64/kernel/crt0.s +++ b/repos/base-hw/src/core/spec/x86_64/kernel/crt0.s @@ -170,9 +170,9 @@ /* GDTE_LONG | GDTE_PRESENT | GDTE_TYPE_DATA_A | GDTE_TYPE_DATA_W | GDTE_NON_SYSTEM */ .long 0x20f300 /* Task segment descriptor */ - .long 0 + .long 0x11000068 /* GDTE_PRESENT | GDTE_SYS_TSS */ - .long 0x8900 + .long 0x893a .long 0 .long 0 _gdt_end: