vbox: remove patches regarding ioport width check

Issue #1129
This commit is contained in:
Alexander Boettcher 2014-04-01 17:09:36 +02:00 committed by Norman Feske
parent 8824ce8962
commit 37dc5c2c78
7 changed files with 13 additions and 142 deletions

View File

@ -1,37 +0,0 @@
+++ src/VBox/Devices/PC/DevACPI.cpp
@@ -438,7 +438,9 @@
uint32_t u32GPE0BLK; /**< port addr of gen-purp event 0 regs block */
uint32_t u32GPE1BLK; /**< port addr of gen-purp event 1 regs block */
uint8_t u8PM1EVTLEN; /**< bytes decoded by PM1a_EVT_BLK. >= 4 */
+#define ACPI_PM1_EVT_LEN 0x4
uint8_t u8PM1CTLLEN; /**< bytes decoded by PM1b_CNT_BLK. >= 2 */
+#define ACPI_PM1_CNT_LEN 0x2
uint8_t u8PM2CTLLEN; /**< bytes decoded by PM2_CNT_BLK. >= 1 or 0 */
uint8_t u8PMTMLEN; /**< bytes decoded by PM_TMR_BLK. ==4 */
uint8_t u8GPE0BLKLEN; /**< bytes decoded by GPE0_BLK. %2==0 */
@@ -1842,10 +1844,10 @@
} while (0)
#define L (GPE0_BLK_LEN / 2)
- R(PM1a_EVT_OFFSET+2, 1, acpiPM1aEnWrite, acpiPm1aEnRead, "ACPI PM1a Enable");
- R(PM1a_EVT_OFFSET, 1, acpiPM1aStsWrite, acpiPm1aStsRead, "ACPI PM1a Status");
- R(PM1a_CTL_OFFSET, 1, acpiPM1aCtlWrite, acpiPm1aCtlRead, "ACPI PM1a Control");
- R(PM_TMR_OFFSET, 1, NULL, acpiPMTmrRead, "ACPI PM Timer");
+ R(PM1a_EVT_OFFSET+2, ACPI_PM1_EVT_LEN / 2, acpiPM1aEnWrite, acpiPm1aEnRead, "ACPI PM1a Enable");
+ R(PM1a_EVT_OFFSET, ACPI_PM1_EVT_LEN / 2, acpiPM1aStsWrite, acpiPm1aStsRead, "ACPI PM1a Status");
+ R(PM1a_CTL_OFFSET, ACPI_PM1_CNT_LEN, acpiPM1aCtlWrite, acpiPm1aCtlRead, "ACPI PM1a Control");
+ R(PM_TMR_OFFSET, 4, NULL, acpiPMTmrRead, "ACPI PM Timer");
R(GPE0_OFFSET + L, L, acpiGpe0EnWrite, acpiGpe0EnRead, "ACPI GPE0 Enable");
R(GPE0_OFFSET, L, acpiGpe0StsWrite, acpiGpe0StsRead, "ACPI GPE0 Status");
#undef L
@@ -2189,8 +2191,8 @@
fadt.u32PMTMRBLK = RT_H2LE_U32(acpiCalcPmPort(pThis, PM_TMR_OFFSET));
fadt.u32GPE0BLK = RT_H2LE_U32(acpiCalcPmPort(pThis, GPE0_OFFSET));
fadt.u32GPE1BLK = RT_H2LE_U32(acpiCalcPmPort(pThis, GPE1_OFFSET));
- fadt.u8PM1EVTLEN = 4;
- fadt.u8PM1CTLLEN = 2;
+ fadt.u8PM1EVTLEN = ACPI_PM1_EVT_LEN;
+ fadt.u8PM1CTLLEN = ACPI_PM1_CNT_LEN;
fadt.u8PM2CTLLEN = 0;
fadt.u8PMTMLEN = 4;
fadt.u8GPE0BLKLEN = GPE0_BLK_LEN;

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@ -1,21 +0,0 @@
+++ src/VBox/Devices/PC/DevACPI.cpp
@@ -3254,13 +3256,13 @@
} while (0)
R(SMI_CMD, 1, acpiSmiWrite, NULL, "ACPI SMI");
#ifdef DEBUG_ACPI
- R(DEBUG_HEX, 1, acpiDhexWrite, NULL, "ACPI Debug hex");
- R(DEBUG_CHR, 1, acpiDchrWrite, NULL, "ACPI Debug char");
+ R(DEBUG_HEX, 4, acpiDhexWrite, NULL, "ACPI Debug hex");
+// R(DEBUG_CHR, 1, acpiDchrWrite, NULL, "ACPI Debug char");
#endif
- R(BAT_INDEX, 1, acpiBatIndexWrite, NULL, "ACPI Battery status index");
- R(BAT_DATA, 1, NULL, acpiBatDataRead, "ACPI Battery status data");
- R(SYSI_INDEX, 1, acpiSysInfoIndexWrite, NULL, "ACPI system info index");
- R(SYSI_DATA, 1, acpiSysInfoDataWrite, acpiSysInfoDataRead, "ACPI system info data");
+ R(BAT_INDEX, 4, acpiBatIndexWrite, NULL, "ACPI Battery status index");
+ R(BAT_DATA, 4, NULL, acpiBatDataRead, "ACPI Battery status data");
+ R(SYSI_INDEX, 4, acpiSysInfoIndexWrite, NULL, "ACPI system info index");
+ R(SYSI_DATA, 4, acpiSysInfoDataWrite, acpiSysInfoDataRead, "ACPI system info data");
R(ACPI_RESET_BLK, 1, acpiResetWrite, NULL, "ACPI Reset");
#undef R

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@ -1,32 +0,0 @@
+++ src/VBox/Devices/Graphics/DevVGA.cpp
@@ -6024,10 +5984,10 @@
#endif /* VBOX_WITH_HGSMI */
#ifdef CONFIG_BOCHS_VBE
- rc = PDMDevHlpIOPortRegister(pDevIns, 0x1ce, 1, NULL, vgaIOPortWriteVBEIndex, vgaIOPortReadVBEIndex, NULL, NULL, "VGA/VBE - Index");
+ rc = PDMDevHlpIOPortRegister(pDevIns, 0x1ce, 2, NULL, vgaIOPortWriteVBEIndex, vgaIOPortReadVBEIndex, NULL, NULL, "VGA/VBE - Index");
if (RT_FAILURE(rc))
return rc;
- rc = PDMDevHlpIOPortRegister(pDevIns, 0x1cf, 1, NULL, vgaIOPortWriteVBEData, vgaIOPortReadVBEData, NULL, NULL, "VGA/VBE - Data");
+ rc = PDMDevHlpIOPortRegister(pDevIns, 0x1cf, 2, NULL, vgaIOPortWriteVBEData, vgaIOPortReadVBEData, NULL, NULL, "VGA/VBE - Data");
if (RT_FAILURE(rc))
return rc;
#endif /* CONFIG_BOCHS_VBE */
@@ -6470,7 +6430,7 @@
/*
* Register I/O Port for the VBE BIOS Extra Data.
*/
- rc = PDMDevHlpIOPortRegister(pDevIns, VBE_EXTRA_PORT, 1, NULL, vbeIOPortWriteVBEExtra, vbeIOPortReadVBEExtra, NULL, NULL, "VBE BIOS Extra Data");
+ rc = PDMDevHlpIOPortRegister(pDevIns, VBE_EXTRA_PORT, 2, NULL, vbeIOPortWriteVBEExtra, vbeIOPortReadVBEExtra, NULL, NULL, "VBE BIOS Extra Data");
if (RT_FAILURE(rc))
return rc;
#endif /* VBE_NEW_DYN_LIST */
@@ -6478,7 +6438,7 @@
/*
* Register I/O Port for the BIOS Logo.
*/
- rc = PDMDevHlpIOPortRegister(pDevIns, LOGO_IO_PORT, 1, NULL, vbeIOPortWriteCMDLogo, vbeIOPortReadCMDLogo, NULL, NULL, "BIOS Logo");
+ rc = PDMDevHlpIOPortRegister(pDevIns, LOGO_IO_PORT, 2, NULL, vbeIOPortWriteCMDLogo, vbeIOPortReadCMDLogo, NULL, NULL, "BIOS Logo");
if (RT_FAILURE(rc))
return rc;

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@ -1,23 +0,0 @@
+++ src/VBox/Devices/Storage/DevATA.cpp 2014-01-28 15:13:14.903523393 +0100
@@ -4596,9 +4596,9 @@
if ((u64ResetTimeStop - pCtl->u64ResetTime) >= 10)
{
- LogRel(("PIIX3 ATA LUN#%d: Async I/O thread probably stuck in operation, interrupting\n", s->iLUN));
+ LogRel(("PIIX3 ATA LUN#%d: Async I/O thread probably stuck in operation, interrupting %llu %llu\n", s->iLUN, u64ResetTimeStop, pCtl->u64ResetTime));
pCtl->u64ResetTime = u64ResetTimeStop;
- RTThreadPoke(pCtl->AsyncIOThread);
+// RTThreadPoke(pCtl->AsyncIOThread);
}
}
#endif
@@ -4699,6 +4699,9 @@
/* Save the timestamp we started the reset. */
pCtl->u64ResetTime = RTTimeMilliTS();
+ LogRel(("PIIX3 ATA ------------------------------------ reset time %llu\n",
+ pCtl->u64ResetTime));
+
/* Issue the reset request now. */
ataAsyncIOPutRequest(pCtl, &g_ataResetARequest);
#else /* !IN_RING3 */

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@ -1,10 +0,0 @@
+++ src/VBox/Devices/Bus/DevPCI.cpp
@@ -2279,7 +2280,7 @@
/*
* Register I/O ports and save state.
*/
- rc = PDMDevHlpIOPortRegister(pDevIns, 0x0cf8, 1, NULL, pciIOPortAddressWrite, pciIOPortAddressRead, NULL, NULL, "i440FX (PCI)");
+ rc = PDMDevHlpIOPortRegister(pDevIns, 0x0cf8, 4, NULL, pciIOPortAddressWrite, pciIOPortAddressRead, NULL, NULL, "i440FX (PCI)");
if (RT_FAILURE(rc))
return rc;
rc = PDMDevHlpIOPortRegister(pDevIns, 0x0cfc, 4, NULL, pciIOPortDataWrite, pciIOPortDataRead, NULL, NULL, "i440FX (PCI)");

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@ -52,7 +52,7 @@ class Guest_ioports
bool contains(RTIOPORT PortStart, RTUINT cPorts) const
{
return (PortStart >= _PortStart)
&& (PortStart + cPorts - 1 <= _PortStart + _cPorts - 1);
&& (PortStart <= _PortStart + _cPorts - 1);
}
bool partof(RTIOPORT PortStart, RTUINT cPorts) const
@ -125,8 +125,10 @@ class Guest_ioports
Range *_lookup(RTIOPORT PortStart, RTUINT cPorts)
{
for (Range *r = _ranges.first(); r; r = r->next())
if (r->contains(PortStart, cPorts))
if (r->contains(PortStart, cPorts)) {
// PINF("lookuped %lx %lx", r->_PortStart, r->_cPorts);
return r;
}
return 0;
}
@ -140,10 +142,14 @@ class Guest_ioports
R3PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStringCallback,
R3PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStringCallback)
{
/*
Range *r = _lookup(PortStart, cPorts);
if (r)
if (r) {
PERR("failure 0x%lx+0x%lx", PortStart, cPorts);
while (1) {}
return VERR_GENERAL_FAILURE;
}
*/
_ranges.insert(new (Genode::env()->heap())
Range(pDevIns, PortStart, cPorts, pvUser,
pfnOutCallback, pfnInCallback,
@ -182,8 +188,8 @@ class Guest_ioports
return r->write(Port, u32Value, cbValue);
char c = u32Value & 0xff;
// PWRN("attempted to write to non-existing port 0x%lx+%u %c (%02x)", Port, cbValue,
// c >= 32 && c <= 176 ? c : '.', c);
PWRN("attempted to write to non-existing port 0x%lx+%u %c (%02x)", Port, cbValue,
c >= 32 && c <= 176 ? c : '.', c);
return VINF_SUCCESS;
// return VERR_GENERAL_FAILURE; /* recompiler does not like this */
}
@ -197,7 +203,7 @@ class Guest_ioports
return err;
}
// PWRN("attempted to read from non-existing port 0x%x+%u %p", port, cbValue, r);
PWRN("attempted to read from non-existing port 0x%x+%u %p", port, cbValue, r);
switch (cbValue)
{

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@ -1,12 +0,0 @@
+++ src/VBox/Devices/Graphics/DevVGA.cpp
@@ -1845,6 +1846,10 @@
dup9 = 0;
if (ch >= 0xb0 && ch <= 0xdf && (s->ar[0x10] & 0x04))
dup9 = 1;
+
+ if (bgcol == fgcol && fgcol == 0) {
+ fgcol = ~0U;
+ }
vga_draw_glyph9(d1, linesize,
font_ptr, cheight, fgcol, bgcol, dup9);
}