From 37856a0ad097bdc887c83948d39e2145920f48e2 Mon Sep 17 00:00:00 2001 From: Stefan Kalkowski Date: Thu, 6 Jun 2013 11:59:31 +0200 Subject: [PATCH] Add print-only dummy UART driver for Exynos5 SoC Fix #759 --- .../platform/arndale/drivers/board_base.h | 1 + os/include/platform/arndale/uart_defs.h | 37 ++++++++ os/src/drivers/uart/exynos5/exynos5_uart.h | 58 ++++++++++++ os/src/drivers/uart/exynos5/main.cc | 92 +++++++++++++++++++ os/src/drivers/uart/exynos5/target.mk | 6 ++ 5 files changed, 194 insertions(+) create mode 100644 os/include/platform/arndale/uart_defs.h create mode 100644 os/src/drivers/uart/exynos5/exynos5_uart.h create mode 100644 os/src/drivers/uart/exynos5/main.cc create mode 100644 os/src/drivers/uart/exynos5/target.mk diff --git a/base/include/platform/arndale/drivers/board_base.h b/base/include/platform/arndale/drivers/board_base.h index 7aece5d9c..dd8bf53f5 100644 --- a/base/include/platform/arndale/drivers/board_base.h +++ b/base/include/platform/arndale/drivers/board_base.h @@ -38,6 +38,7 @@ namespace Genode /* UART */ UART_2_MMIO_BASE = 0x12C20000, UART_2_CLOCK = 100000000, + UART_2_IRQ = 85, /* timer */ PWM_MMIO_BASE = 0x12dd0000, diff --git a/os/include/platform/arndale/uart_defs.h b/os/include/platform/arndale/uart_defs.h new file mode 100644 index 000000000..61eac15e4 --- /dev/null +++ b/os/include/platform/arndale/uart_defs.h @@ -0,0 +1,37 @@ +/* + * \brief EXYNOS5 UART definitions + * \author Stefan Kalkowski + * \date 2013-06-05 + */ + +/* + * Copyright (C) 2013 Genode Labs GmbH + * + * This file is part of the Genode OS framework, which is distributed + * under the terms of the GNU General Public License version 2. + */ + +#ifndef _INCLUDE__PLATFORM__ARNDALE__UART_DEFS_H_ +#define _INCLUDE__PLATFORM__ARNDALE__UART_DEFS_H_ + +#include + +enum { + /** Number of UARTs */ + UARTS_NUM = 2, + + BAUD_115200 = 115200, +}; + + +static struct Exynos_uart_cfg { + Genode::addr_t mmio_base; + Genode::size_t mmio_size; + int irq_number; +} exynos_uart_cfg[UARTS_NUM] = { + /* temporary workaround having first UART twice (most run-scripts have first UART reserved for the kernel ) */ + { Genode::Board_base::UART_2_MMIO_BASE, 4096, Genode::Board_base::UART_2_IRQ }, + { Genode::Board_base::UART_2_MMIO_BASE, 4096, Genode::Board_base::UART_2_IRQ }, +}; + +#endif /* _INCLUDE__PLATFORM__ARNDALE__UART_DEFS_H_ */ diff --git a/os/src/drivers/uart/exynos5/exynos5_uart.h b/os/src/drivers/uart/exynos5/exynos5_uart.h new file mode 100644 index 000000000..7da5ecaf9 --- /dev/null +++ b/os/src/drivers/uart/exynos5/exynos5_uart.h @@ -0,0 +1,58 @@ +/* + * \brief Driver for EXYNOS5 UARTs + * \author Ivan Loskutov + * \date 2013-06-05 + */ + +/* + * Copyright (C) 2013 Genode Labs GmbH + * + * This file is part of the Genode OS framework, which is distributed + * under the terms of the GNU General Public License version 2. + */ + +#ifndef _EXYNOS_UART_H_ +#define _EXYNOS_UART_H_ + +/* Genode includes */ +#include +#include +#include +#include + +#include + +/* local includes */ +#include "uart_driver.h" + +class Exynos_uart : public Genode::Arndale_uart_base, public Uart::Driver, public Genode::Irq_handler +{ + public: + + /** + * Constructor + */ + Exynos_uart(Genode::Attached_io_mem_dataspace *uart_mmio, int irq_number, + unsigned baud_rate, Uart::Char_avail_callback &callback) + : + Arndale_uart_base((Genode::addr_t)uart_mmio->local_addr(), + Genode::Board_base::UART_2_CLOCK, baud_rate) { } + + /** + * * IRQ handler interface ** + */ + void handle_irq(int irq_number) { } + + /** + * * UART driver interface ** + */ + void put_char(char c) { Arndale_uart_base::put_char(c); } + + bool char_avail() { return false; } + + char get_char() { return 0; } + + void baud_rate(int bits_per_second) {} +}; + +#endif /* _EXYNOS_UART_H_ */ diff --git a/os/src/drivers/uart/exynos5/main.cc b/os/src/drivers/uart/exynos5/main.cc new file mode 100644 index 000000000..4631b4c88 --- /dev/null +++ b/os/src/drivers/uart/exynos5/main.cc @@ -0,0 +1,92 @@ +/* + * \brief Driver for Exynos5 UART + * \author Stefan Kalkowski + * \date 2013-06-05 + */ + +/* + * Copyright (C) 2013 Genode Labs GmbH + * + * This file is part of the Genode OS framework, which is distributed + * under the terms of the GNU General Public License version 2. + */ + +/* Genode includes */ +#include +#include +#include +#include +#include + +#include + +/* local includes */ +#include "exynos5_uart.h" +#include "uart_component.h" + + +int main(int argc, char **argv) +{ + using namespace Genode; + + PINF("--- Exynos5 UART driver started ---\n"); + + /** + * Factory used by 'Terminal::Root' at session creation/destruction time + */ + struct Exynos_uart_driver_factory : Uart::Driver_factory + { + Exynos_uart *created[UARTS_NUM]; + + /** + * Constructor + */ + Exynos_uart_driver_factory() + { + for (unsigned i = 0; i < UARTS_NUM; i++) + created[i] = 0; + } + + Uart::Driver *create(unsigned index, unsigned baudrate, + Uart::Char_avail_callback &callback) + { + if (index >= UARTS_NUM) + throw Uart::Driver_factory::Not_available(); + + if (baudrate == 0) + { + PDBG("Baudrate is not defined. Use default 115200"); + baudrate = BAUD_115200; + } + + Exynos_uart_cfg *cfg = &exynos_uart_cfg[index]; + Exynos_uart *uart = created[index]; + + Genode::Attached_io_mem_dataspace *uart_mmio = new (env()->heap()) + Genode::Attached_io_mem_dataspace(cfg->mmio_base, cfg->mmio_size); + + if (!uart) { + uart = new (env()->heap()) + Exynos_uart(uart_mmio, cfg->irq_number, baudrate, callback); + + /* update 'created' table */ + created[index] = uart; + } + return uart; + } + + void destroy(Uart::Driver *driver) { /* TODO */ } + + } driver_factory; + + enum { STACK_SIZE = 0x2000 }; + static Cap_connection cap; + + static Rpc_entrypoint ep(&cap, STACK_SIZE, "uart_ep"); + + static Uart::Root uart_root(&ep, env()->heap(), driver_factory); + env()->parent()->announce(ep.manage(&uart_root)); + + sleep_forever(); + return 0; +} diff --git a/os/src/drivers/uart/exynos5/target.mk b/os/src/drivers/uart/exynos5/target.mk new file mode 100644 index 000000000..183768ec4 --- /dev/null +++ b/os/src/drivers/uart/exynos5/target.mk @@ -0,0 +1,6 @@ +TARGET = uart_drv +REQUIRES = exynos5 +SRC_CC = main.cc +LIBS = base + +INC_DIR += $(PRG_DIR) $(PRG_DIR)/..