hw: clean cache lines of altered translation table
For Cortex A8, and ARM1176JZF clean cache lines of altered MMU translation tables. Fix #1194
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@ -272,6 +272,11 @@ class Arm::Section_table
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/* compose new descriptor value */
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/* compose new descriptor value */
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_entries[i] = Small_page::create(flags, pa);
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_entries[i] = Small_page::create(flags, pa);
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/* some processors need to act on changed translations */
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using Cpu = Genode::Processor_driver;
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Cpu::translation_added((addr_t)&_entries[i],
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sizeof(Descriptor::access_t));
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}
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}
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}
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}
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@ -510,6 +515,11 @@ class Arm::Section_table
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Page_table * pt_phys = (Page_table*) slab->phys_addr(pt);
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Page_table * pt_phys = (Page_table*) slab->phys_addr(pt);
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pt_phys = pt_phys ? pt_phys : pt; /* hack for core */
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pt_phys = pt_phys ? pt_phys : pt; /* hack for core */
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_entries[i] = Page_table_descriptor::create(pt_phys);
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_entries[i] = Page_table_descriptor::create(pt_phys);
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/* some processors need to act on changed translations */
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using Cpu = Genode::Processor_driver;
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Cpu::translation_added((addr_t)&_entries[i],
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sizeof(Descriptor::access_t));
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}
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}
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case Descriptor::PAGE_TABLE:
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case Descriptor::PAGE_TABLE:
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@ -597,6 +607,11 @@ class Arm::Section_table
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_entries[i] != Section::create(flags, pa))
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_entries[i] != Section::create(flags, pa))
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throw Double_insertion();
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throw Double_insertion();
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_entries[i] = Section::create(flags, pa);
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_entries[i] = Section::create(flags, pa);
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/* some processors need to act on changed translations */
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using Cpu = Genode::Processor_driver;
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Cpu::translation_added((addr_t)&_entries[i],
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sizeof(Descriptor::access_t));
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break;
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break;
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}
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}
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@ -622,6 +622,12 @@ namespace Arm
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}
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}
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};
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};
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/**
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* Returns true if current execution context is running in user mode
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*/
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inline static bool is_user() {
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return Psr::M::get(Psr::read()) == Psr::M::USER; }
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/**
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/**
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* Invalidate all entries of all instruction caches
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* Invalidate all entries of all instruction caches
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*/
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*/
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@ -230,6 +230,20 @@ namespace Arm_v6
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* Return wether to retry an undefined user instruction after this call
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* Return wether to retry an undefined user instruction after this call
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*/
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*/
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bool retry_undefined_instr(Processor_lazy_state *) { return false; }
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bool retry_undefined_instr(Processor_lazy_state *) { return false; }
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/**
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* The ARM1176JZF-S processor cannot page table walk from level one cache.
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* Therefore, as the page-tables lie in write-back cacheable memory we've
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* to clean the corresponding cache-lines even when a page table entry is added
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*/
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static void translation_added(Genode::addr_t addr, Genode::size_t size)
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{
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/*
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* only clean lines as core, the kernel adds entries
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* before MMU and caches are enabled
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*/
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if (is_user()) Kernel::update_data_region(addr, size);
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}
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};
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};
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}
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}
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@ -49,6 +49,12 @@ namespace Cortex_a15
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* Return wether to retry an undefined user instruction after this call
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* Return wether to retry an undefined user instruction after this call
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*/
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*/
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bool retry_undefined_instr(Processor_lazy_state *) { return false; }
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bool retry_undefined_instr(Processor_lazy_state *) { return false; }
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/**
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* After a page-fault resolution nothing needs to be done
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*/
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static void translation_added(Genode::addr_t addr,
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Genode::size_t size) { }
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};
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};
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}
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}
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@ -44,6 +44,20 @@ namespace Cortex_a8
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* Return wether to retry an undefined user instruction after this call
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* Return wether to retry an undefined user instruction after this call
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*/
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*/
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bool retry_undefined_instr(Processor_lazy_state *) { return false; }
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bool retry_undefined_instr(Processor_lazy_state *) { return false; }
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/**
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* The Cortex A8 processor cannot page table walk from level one cache.
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* Therefore, as the page-tables lie in write-back cacheable memory we've
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* to clean the corresponding cache-lines even when a page table entry is added
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*/
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static void translation_added(Genode::addr_t addr, Genode::size_t size)
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{
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/*
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* only clean lines as core, the kernel adds entries
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* before MMU and caches are enabled
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*/
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if (is_user()) Kernel::update_data_region(addr, size);
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}
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};
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};
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}
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}
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@ -290,6 +290,12 @@ class Cortex_a9::Processor_driver : public Arm_v7::Processor_driver
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}
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}
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return true;
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return true;
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}
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}
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/**
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* After a page-fault resolution nothing needs to be done
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*/
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static void translation_added(Genode::addr_t addr,
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Genode::size_t size) { }
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};
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};
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@ -113,7 +113,7 @@ namespace Genode
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SECURITY_EXTENSION = 1,
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SECURITY_EXTENSION = 1,
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/* CPU cache */
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/* CPU cache */
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CACHE_LINE_SIZE_LOG2 = 2, /* FIXME get correct value from board spec */
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CACHE_LINE_SIZE_LOG2 = 6,
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};
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};
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};
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};
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}
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}
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@ -57,7 +57,7 @@ namespace Genode
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SECURITY_EXTENSION = 0,
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SECURITY_EXTENSION = 0,
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/* CPU cache */
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/* CPU cache */
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CACHE_LINE_SIZE_LOG2 = 2, /* FIXME get correct value from board spec */
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CACHE_LINE_SIZE_LOG2 = 5,
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};
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};
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enum Videocore_cache_policy { NON_COHERENT = 0,
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enum Videocore_cache_policy { NON_COHERENT = 0,
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