os: transition to new API for vmm (ref #1987)
This commit is contained in:
Stefan Kalkowski
Norman Feske
parent
128cd852b7
commit
15171eaac6
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@ -12,14 +12,13 @@
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*/
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/* Genode includes */
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#include <base/attached_ram_dataspace.h>
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#include <base/attached_rom_dataspace.h>
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#include <base/component.h>
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#include <base/exception.h>
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#include <base/log.h>
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#include <cpu/cpu_state.h>
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#include <drivers/board_base.h>
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#include <io_mem_session/connection.h>
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#include <irq_session/connection.h>
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#include <os/attached_ram_dataspace.h>
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#include <os/attached_rom_dataspace.h>
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#include <os/ring_buffer.h>
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#include <terminal_session/connection.h>
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#include <timer_session/connection.h>
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@ -30,6 +29,7 @@
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#include <vm_state.h>
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#include <board.h>
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struct State : Genode::Vm_state
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{
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Genode::uint32_t midr;
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@ -124,7 +124,7 @@ class Vm {
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Genode::Attached_rom_dataspace _dtb_rom;
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Genode::Attached_ram_dataspace _vm_ram;
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Ram _ram;
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State *_state;
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State & _state;
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bool _active = true;
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void _load_kernel()
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@ -132,7 +132,7 @@ class Vm {
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Genode::memcpy((void*)(_ram.local() + KERNEL_OFFSET),
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_kernel_rom.local_addr<void>(),
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_kernel_rom.size());
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_state->ip = _ram.base() + KERNEL_OFFSET;
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_state.ip = _ram.base() + KERNEL_OFFSET;
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}
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void _load_dtb()
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@ -140,7 +140,7 @@ class Vm {
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Genode::memcpy((void*)(_ram.local() + DTB_OFFSET),
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_dtb_rom.local_addr<void>(),
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_dtb_rom.size());
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_state->r2 = _ram.base() + DTB_OFFSET;
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_state.r2 = _ram.base() + DTB_OFFSET;
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}
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public:
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@ -172,12 +172,13 @@ class Vm {
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Vm(const char *kernel, const char *dtb, Genode::size_t const ram_size,
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Genode::Signal_context_capability sig_cap)
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: _kernel_rom(kernel),
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_dtb_rom(dtb),
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_vm_ram(Genode::env()->ram_session(), ram_size, Genode::UNCACHED),
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Genode::Signal_context_capability sig_cap, Genode::Env & env)
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: _vm_con(env),
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_kernel_rom(env, kernel),
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_dtb_rom(env, dtb),
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_vm_ram(env.ram(), env.rm(), ram_size, Genode::UNCACHED),
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_ram(RAM_ADDRESS, ram_size, (Genode::addr_t)_vm_ram.local_addr<void>()),
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_state((State*)Genode::env()->rm_session()->attach(_vm_con.cpu_state()))
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_state(*((State*)env.rm().attach(_vm_con.cpu_state())))
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{
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Genode::log("ram is at ",
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Genode::Hex(Genode::Dataspace_client(_vm_ram.cap()).phys_addr()));
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@ -189,23 +190,23 @@ class Vm {
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void start()
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{
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Genode::memset((void*)_state, 0, sizeof(Genode::Cpu_state_modes));
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Genode::memset((void*)&_state, 0, sizeof(Genode::Cpu_state_modes));
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_load_kernel();
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_load_dtb();
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_state->r1 = MACH_TYPE;
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_state->cpsr = 0x93; /* SVC mode and IRQs disabled */
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_state.r1 = MACH_TYPE;
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_state.cpsr = 0x93; /* SVC mode and IRQs disabled */
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_state->timer_ctrl = 0;
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_state->timer_val = 0;
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_state->timer_irq = false;
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_state.timer_ctrl = 0;
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_state.timer_val = 0;
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_state.timer_irq = false;
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_state->gic_hcr = 0b101;
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_state->gic_vmcr = 0x4c0000;
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_state->gic_apr = 0;
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_state->gic_lr[0] = 0;
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_state->gic_lr[1] = 0;
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_state->gic_lr[2] = 0;
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_state->gic_lr[3] = 0;
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_state.gic_hcr = 0b101;
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_state.gic_vmcr = 0x4c0000;
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_state.gic_apr = 0;
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_state.gic_lr[0] = 0;
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_state.gic_lr[1] = 0;
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_state.gic_lr[2] = 0;
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_state.gic_lr[3] = 0;
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Genode::log("ready to run");
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}
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@ -227,43 +228,69 @@ class Vm {
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"data_abort", "irq", "fiq", "trap" };
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log("Cpu state:");
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log(" r0 = ", Hex(_state->r0, Hex::PREFIX, Hex::PAD));
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log(" r1 = ", Hex(_state->r1, Hex::PREFIX, Hex::PAD));
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log(" r2 = ", Hex(_state->r2, Hex::PREFIX, Hex::PAD));
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log(" r3 = ", Hex(_state->r3, Hex::PREFIX, Hex::PAD));
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log(" r4 = ", Hex(_state->r4, Hex::PREFIX, Hex::PAD));
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log(" r5 = ", Hex(_state->r5, Hex::PREFIX, Hex::PAD));
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log(" r6 = ", Hex(_state->r6, Hex::PREFIX, Hex::PAD));
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log(" r7 = ", Hex(_state->r7, Hex::PREFIX, Hex::PAD));
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log(" r8 = ", Hex(_state->r8, Hex::PREFIX, Hex::PAD));
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log(" r9 = ", Hex(_state->r9, Hex::PREFIX, Hex::PAD));
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log(" r10 = ", Hex(_state->r10, Hex::PREFIX, Hex::PAD));
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log(" r11 = ", Hex(_state->r11, Hex::PREFIX, Hex::PAD));
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log(" r12 = ", Hex(_state->r12, Hex::PREFIX, Hex::PAD));
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log(" sp = ", Hex(_state->sp, Hex::PREFIX, Hex::PAD));
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log(" lr = ", Hex(_state->lr, Hex::PREFIX, Hex::PAD));
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log(" ip = ", Hex(_state->ip, Hex::PREFIX, Hex::PAD));
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log(" cpsr = ", Hex(_state->cpsr, Hex::PREFIX, Hex::PAD));
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log(" r0 = ", Hex(_state.r0, Hex::PREFIX, Hex::PAD));
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log(" r1 = ", Hex(_state.r1, Hex::PREFIX, Hex::PAD));
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log(" r2 = ", Hex(_state.r2, Hex::PREFIX, Hex::PAD));
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log(" r3 = ", Hex(_state.r3, Hex::PREFIX, Hex::PAD));
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log(" r4 = ", Hex(_state.r4, Hex::PREFIX, Hex::PAD));
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log(" r5 = ", Hex(_state.r5, Hex::PREFIX, Hex::PAD));
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log(" r6 = ", Hex(_state.r6, Hex::PREFIX, Hex::PAD));
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log(" r7 = ", Hex(_state.r7, Hex::PREFIX, Hex::PAD));
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log(" r8 = ", Hex(_state.r8, Hex::PREFIX, Hex::PAD));
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log(" r9 = ", Hex(_state.r9, Hex::PREFIX, Hex::PAD));
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log(" r10 = ", Hex(_state.r10, Hex::PREFIX, Hex::PAD));
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log(" r11 = ", Hex(_state.r11, Hex::PREFIX, Hex::PAD));
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log(" r12 = ", Hex(_state.r12, Hex::PREFIX, Hex::PAD));
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log(" sp = ", Hex(_state.sp, Hex::PREFIX, Hex::PAD));
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log(" lr = ", Hex(_state.lr, Hex::PREFIX, Hex::PAD));
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log(" ip = ", Hex(_state.ip, Hex::PREFIX, Hex::PAD));
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log(" cpsr = ", Hex(_state.cpsr, Hex::PREFIX, Hex::PAD));
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for (unsigned i = 0;
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i < State::Mode_state::MAX; i++) {
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log(" sp_", modes[i], " = ",
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Hex(_state->mode[i].sp, Hex::PREFIX, Hex::PAD));
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Hex(_state.mode[i].sp, Hex::PREFIX, Hex::PAD));
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log(" lr_", modes[i], " = ",
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Hex(_state->mode[i].lr, Hex::PREFIX, Hex::PAD));
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Hex(_state.mode[i].lr, Hex::PREFIX, Hex::PAD));
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log(" spsr_", modes[i], " = ",
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Hex(_state->mode[i].spsr, Hex::PREFIX, Hex::PAD));
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Hex(_state.mode[i].spsr, Hex::PREFIX, Hex::PAD));
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}
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log(" exception = ", exc[_state->cpu_exception]);
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log(" exception = ", exc[_state.cpu_exception]);
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}
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State *state() const { return _state; }
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State & state() const { return _state; }
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};
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class Vmm
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{
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private:
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template <typename T>
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struct Signal_handler : Genode::Signal_handler<Signal_handler<T>>
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{
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using Base = Genode::Signal_handler<Signal_handler<T>>;
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Vmm & vmm;
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T & obj;
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void (T::*member)();
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void handle()
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{
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try {
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vmm.handle_vm([this] () { (obj.*member)(); });
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} catch(Vm::Exception &e) {
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e.print();
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vmm.vm().dump();
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}
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}
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Signal_handler(Vmm & vmm, Genode::Entrypoint &ep, T & o,
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void (T::*f)())
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: Base(ep, *this, &Signal_handler::handle),
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vmm(vmm), obj(o), member(f) {}
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};
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struct Hsr : Genode::Register<32>
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{
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struct Ec : Bitfield<26, 6>
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@ -344,14 +371,14 @@ class Vmm
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Register * r =
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Avl_node<Register>::child(e > _encoding);
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return r ? r->find_by_encoding(e) : 0;
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return r ? r->find_by_encoding(e) : nullptr;
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}
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void write(State * state, Genode::addr_t v) {
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state->*_r = (Genode::uint32_t)v; }
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void write(State & state, Genode::addr_t v) {
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state.*_r = (Genode::uint32_t)v; }
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Genode::addr_t read(State * state) const {
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return (Genode::addr_t)(state->*_r); }
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Genode::addr_t read(State & state) const {
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return (Genode::addr_t)(state.*_r); }
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/************************
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@ -366,14 +393,14 @@ class Vmm
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public:
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bool handle_trap(State *state)
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bool handle_trap(State & state)
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{
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Iss::access_t v = state->hsr;
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Iss::access_t v = state.hsr;
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Register * reg = _reg_tree.first();
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if (reg) reg = reg->find_by_encoding(Iss::mask_encoding(v));
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if (!reg) {
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Genode::error("unknown cp15 access @ ip=", state->ip, ":");
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Genode::error("unknown cp15 access @ ip=", state.ip, ":");
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Genode::error(Iss::Direction::get(v) ? "read" : "write",
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": "
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"c15 ", Iss::Opcode1::get(v), " "
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@ -385,16 +412,16 @@ class Vmm
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}
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if (Iss::Direction::get(v)) { /* read access */
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*(state->r(Iss::Register::get(v))) = reg->read(state);
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*(state.r(Iss::Register::get(v))) = reg->read(state);
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} else { /* write access */
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if (!reg->writeable()) {
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Genode::error("writing to cp15 register ",
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reg->name(), " not allowed!");
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return false;
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}
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reg->write(state, *(state->r(Iss::Register::get(v))));
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reg->write(state, *(state.r(Iss::Register::get(v))));
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}
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state->ip += sizeof(Genode::addr_t);
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state.ip += sizeof(Genode::addr_t);
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return true;
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}
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};
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@ -436,7 +463,7 @@ class Vmm
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public:
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Cp15(State *state)
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Cp15(State & state)
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{
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for (unsigned i = 0; i < (sizeof(_regs) / sizeof(Register));
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i++) {
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@ -470,7 +497,7 @@ class Vmm
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const char * const _name;
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const Genode::uint64_t _addr;
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const Genode::uint64_t _size;
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Vm *_vm;
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Vm & _vm;
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using Error = Vm::Exception;
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@ -479,11 +506,9 @@ class Vmm
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Device(const char * const name,
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const Genode::uint64_t addr,
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const Genode::uint64_t size,
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Vm *vm)
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Vm & vm)
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: _name(name), _addr(addr), _size(size), _vm(vm) { }
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Device() : Device("undefined", 0, 0, nullptr) {}
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Genode::uint64_t addr() { return _addr; }
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Genode::uint64_t size() { return _size; }
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const char * name() { return _name; }
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@ -522,35 +547,35 @@ class Vmm
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virtual void irq_disabled(unsigned irq) { }
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virtual void irq_handled (unsigned irq) { }
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void handle_memory_access(State *state)
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void handle_memory_access(State & state)
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{
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using namespace Genode;
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if (!Iss::valid(state->hsr))
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if (!Iss::valid(state.hsr))
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throw Error("Device %s: unknown HSR=%lx",
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name(), state->hsr);
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name(), state.hsr);
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bool wr = Iss::Write::get(state->hsr);
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unsigned idx = Iss::Register::get(state->hsr);
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uint64_t ipa = (uint64_t)state->hpfar << 8;
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uint64_t off = ipa - addr() + (state->hdfar & ((1 << 13) - 1));
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bool wr = Iss::Write::get(state.hsr);
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unsigned idx = Iss::Register::get(state.hsr);
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uint64_t ipa = (uint64_t)state.hpfar << 8;
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uint64_t off = ipa - addr() + (state.hdfar & ((1 << 13) - 1));
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switch (Iss::Access_size::get(state->hsr)) {
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switch (Iss::Access_size::get(state.hsr)) {
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case Iss::Access_size::BYTE:
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{
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uint8_t * p = (uint8_t*)state->r(idx) + (off & 0b11);
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uint8_t * p = (uint8_t*)state.r(idx) + (off & 0b11);
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wr ? write(p, off) : read(p, off);
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break;
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}
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case Iss::Access_size::HALFWORD:
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{
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uint16_t * p = (uint16_t*) state->r(idx) + (off & 0b1);
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uint16_t * p = (uint16_t*) state.r(idx) + (off & 0b1);
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wr ? write(p, off) : read(p, off);
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break;
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}
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case Iss::Access_size::WORD:
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{
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uint32_t * p = (uint32_t*) state->r(idx);
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uint32_t * p = (uint32_t*) state.r(idx);
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wr ? write(p, off) : read(p, off);
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break;
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}
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@ -571,7 +596,7 @@ class Vmm
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return this;
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Device *d = Avl_node<Device>::child(a > addr());
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return d ? d->find_by_addr(a) : 0;
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return d ? d->find_by_addr(a) : nullptr;
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}
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};
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@ -631,49 +656,49 @@ class Vmm
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void _handle_eoi()
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{
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if (!(_vm->state()->gic_misr & 1)) return;
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if (!(_vm.state().gic_misr & 1)) return;
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for (unsigned i = 0; i < State::NR_IRQ; i++) {
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if (_vm->state()->gic_eisr & (1 << i)) {
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unsigned irq = Gich_lr::Virt_id::get(_vm->state()->gic_lr[i]);
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if (_vm.state().gic_eisr & (1 << i)) {
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unsigned irq = Gich_lr::Virt_id::get(_vm.state().gic_lr[i]);
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if (irq > MAX_IRQ)
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throw Error("IRQ out of bounds");
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_vm->state()->gic_lr[i] = 0;
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_vm->state()->gic_elrsr0 |= 1 << i;
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_vm.state().gic_lr[i] = 0;
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_vm.state().gic_elrsr0 |= 1 << i;
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if (irq == TIMER &&
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_irqs[irq].distr_state == Irq::ENABLED)
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_vm->state()->timer_irq = true;
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_vm.state().timer_irq = true;
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_irqs[irq].cpu_state = Irq::INACTIVE;
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}
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}
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_vm->state()->gic_misr = 0;
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_vm.state().gic_misr = 0;
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}
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void _inject_irq(unsigned irq, bool eoi)
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{
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if (irq == TIMER)
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_vm->state()->timer_irq = false;
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_vm.state().timer_irq = false;
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for (unsigned i = 0; i < State::NR_IRQ; i++) {
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if (!(_vm->state()->gic_elrsr0 & (1 << i))) {
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Gich_lr::access_t v = _vm->state()->gic_lr[i];
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if (!(_vm.state().gic_elrsr0 & (1 << i))) {
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Gich_lr::access_t v = _vm.state().gic_lr[i];
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if (Gich_lr::Virt_id::get(v) == irq)
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return;
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}
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}
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for (unsigned i = 0; i < State::NR_IRQ; i++) {
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if (!(_vm->state()->gic_elrsr0 & (1 << i)))
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if (!(_vm.state().gic_elrsr0 & (1 << i)))
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continue;
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_vm->state()->gic_elrsr0 &= ~(1 << i);
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_vm.state().gic_elrsr0 &= ~(1 << i);
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Gich_lr::access_t v = 0;
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Gich_lr::Virt_id::set(v, irq);
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Gich_lr::Phys_id::set(v, eoi ? 1 << 9 : 0);
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Gich_lr::Prio::set(v, 0);
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Gich_lr::State::set(v, 0b1);
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_vm->state()->gic_lr[i] = v;
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_vm.state().gic_lr[i] = v;
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return;
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}
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@ -692,7 +717,7 @@ class Vmm
|
|||
_irqs[irq].device->irq_enabled(irq);
|
||||
|
||||
if (irq == TIMER)
|
||||
_vm->state()->timer_irq = true;
|
||||
_vm.state().timer_irq = true;
|
||||
}
|
||||
|
||||
void _disable_irq(unsigned irq)
|
||||
|
|
@ -707,7 +732,7 @@ class Vmm
|
|||
_irqs[irq].device->irq_disabled(irq);
|
||||
|
||||
if (irq == TIMER)
|
||||
_vm->state()->timer_irq = false;
|
||||
_vm.state().timer_irq = false;
|
||||
}
|
||||
|
||||
public:
|
||||
|
|
@ -715,7 +740,7 @@ class Vmm
|
|||
Gic(const char * const name,
|
||||
const Genode::uint64_t addr,
|
||||
const Genode::uint64_t size,
|
||||
Vm *vm)
|
||||
Vm & vm)
|
||||
: Device(name, addr, size, vm)
|
||||
{
|
||||
for (unsigned i = 0; i <= MAX_IRQ; i++) {
|
||||
|
|
@ -828,12 +853,12 @@ class Vmm
|
|||
}
|
||||
|
||||
_inject_irq(irq, _irqs[irq].eoi);
|
||||
_vm->interrupt();
|
||||
_vm.interrupt();
|
||||
}
|
||||
|
||||
void irq_occured()
|
||||
{
|
||||
switch(_vm->state()->gic_irq) {
|
||||
switch(_vm.state().gic_irq) {
|
||||
case Genode::Board_base::VT_MAINTAINANCE_IRQ:
|
||||
_handle_eoi();
|
||||
return;
|
||||
|
|
@ -842,7 +867,7 @@ class Vmm
|
|||
return;
|
||||
default:
|
||||
throw Error("Unknown IRQ %u occured",
|
||||
_vm->state()->gic_irq);
|
||||
_vm.state().gic_irq);
|
||||
};
|
||||
}
|
||||
};
|
||||
|
|
@ -854,14 +879,14 @@ class Vmm
|
|||
|
||||
using Board = Genode::Board_base;
|
||||
|
||||
Timer::Connection _timer;
|
||||
Genode::Signal_dispatcher<Generic_timer> _handler;
|
||||
Gic &_gic;
|
||||
Timer::Connection _timer;
|
||||
Signal_handler<Generic_timer> _handler;
|
||||
Gic &_gic;
|
||||
|
||||
void _timeout(unsigned)
|
||||
void _timeout()
|
||||
{
|
||||
_vm->state()->timer_ctrl = 5;
|
||||
_vm->state()->timer_val = 0xffffffff;
|
||||
_vm.state().timer_ctrl = 5;
|
||||
_vm.state().timer_val = 0xffffffff;
|
||||
_gic.inject_irq(Board::VT_TIMER_IRQ);
|
||||
}
|
||||
|
||||
|
|
@ -870,20 +895,22 @@ class Vmm
|
|||
Generic_timer(const char * const name,
|
||||
const Genode::uint64_t addr,
|
||||
const Genode::uint64_t size,
|
||||
Vm *vm,
|
||||
Genode::Signal_receiver &receiver,
|
||||
Vmm &vmm,
|
||||
Genode::Env &env,
|
||||
Gic &gic)
|
||||
: Device(name, addr, size, vm),
|
||||
_handler(receiver, *this, &Generic_timer::_timeout),
|
||||
_gic(gic) {
|
||||
: Device(name, addr, size, vmm.vm()),
|
||||
_timer(env),
|
||||
_handler(vmm, env.ep(), *this, &Generic_timer::_timeout),
|
||||
_gic(gic)
|
||||
{
|
||||
_timer.sigh(_handler);
|
||||
_gic.register_irq(Board::VT_TIMER_IRQ, this, true);
|
||||
}
|
||||
|
||||
void schedule_timeout()
|
||||
{
|
||||
if ((_vm->state()->timer_ctrl & 0b101) != 0b101)
|
||||
_timer.trigger_once(_vm->state()->timer_val / 24);
|
||||
if ((_vm.state().timer_ctrl & 0b101) != 0b101)
|
||||
_timer.trigger_once(_vm.state().timer_val / 24);
|
||||
}
|
||||
};
|
||||
|
||||
|
|
@ -968,8 +995,9 @@ class Vmm
|
|||
System_register(const char * const name,
|
||||
const Genode::uint64_t addr,
|
||||
const Genode::uint64_t size,
|
||||
Vm *vm)
|
||||
: Device(name, addr, size, vm) {}
|
||||
Vm & vm,
|
||||
Genode::Env & env)
|
||||
: Device(name, addr, size, vm), _timer(env) {}
|
||||
|
||||
void read(Genode::uint32_t * reg, Genode::uint64_t off)
|
||||
{
|
||||
|
|
@ -1064,16 +1092,16 @@ class Vmm
|
|||
UARTPCELLID3 = 0xffc,
|
||||
};
|
||||
|
||||
Terminal::Connection _terminal;
|
||||
Genode::Signal_dispatcher<Pl011> _handler;
|
||||
Gic &_gic;
|
||||
Ring_buffer _rx_buf;
|
||||
Genode::uint16_t _ibrd = 0;
|
||||
Genode::uint16_t _fbrd = 0;
|
||||
Genode::uint16_t _lcr_h = 0;
|
||||
Genode::uint16_t _imsc = 0b1111;
|
||||
Genode::uint16_t _ris = 0;
|
||||
Genode::uint16_t _cr = 0x300;
|
||||
Terminal::Connection _terminal;
|
||||
Signal_handler<Pl011> _handler;
|
||||
Gic &_gic;
|
||||
Ring_buffer _rx_buf;
|
||||
Genode::uint16_t _ibrd = 0;
|
||||
Genode::uint16_t _fbrd = 0;
|
||||
Genode::uint16_t _lcr_h = 0;
|
||||
Genode::uint16_t _imsc = 0b1111;
|
||||
Genode::uint16_t _ris = 0;
|
||||
Genode::uint16_t _cr = 0x300;
|
||||
|
||||
void _out_char(unsigned char c) {
|
||||
_terminal.write(&c, 1);
|
||||
|
|
@ -1127,7 +1155,7 @@ class Vmm
|
|||
_imsc = mask;
|
||||
}
|
||||
|
||||
void _read(unsigned)
|
||||
void _read()
|
||||
{
|
||||
if (!_terminal.avail()) return;
|
||||
|
||||
|
|
@ -1146,11 +1174,12 @@ class Vmm
|
|||
Pl011(const char * const name,
|
||||
const Genode::uint64_t addr,
|
||||
const Genode::uint64_t size,
|
||||
Vm *vm,
|
||||
Genode::Signal_receiver &receiver,
|
||||
Vmm &vmm,
|
||||
Genode::Env &env,
|
||||
Gic &gic)
|
||||
: Device(name, addr, size, vm),
|
||||
_handler(receiver, *this, &Pl011::_read),
|
||||
: Device(name, addr, size, vmm.vm()),
|
||||
_terminal(env),
|
||||
_handler(vmm, env.ep(), *this, &Pl011::_read),
|
||||
_gic(gic) {
|
||||
_terminal.read_avail_sigh(_handler);
|
||||
_gic.register_irq(Board::PL011_0_IRQ, this, false);
|
||||
|
|
@ -1210,8 +1239,7 @@ class Vmm
|
|||
};
|
||||
|
||||
|
||||
Genode::Signal_receiver _sig_rcv;
|
||||
Genode::Signal_dispatcher<Vmm> _vm_handler;
|
||||
Signal_handler<Vmm> _vm_handler;
|
||||
Vm _vm;
|
||||
Cp15 _cp15;
|
||||
Genode::Avl_tree<Device> _device_tree;
|
||||
|
|
@ -1225,29 +1253,29 @@ class Vmm
|
|||
|
||||
void _handle_data_abort()
|
||||
{
|
||||
Genode::uint64_t ipa = (Genode::uint64_t)_vm.state()->hpfar << 8;
|
||||
Genode::uint64_t ipa = (Genode::uint64_t)_vm.state().hpfar << 8;
|
||||
Device * device = _device_tree.first()
|
||||
? _device_tree.first()->find_by_addr(ipa) : nullptr;
|
||||
if (!device)
|
||||
throw Vm::Exception("No device at IPA=%llx", ipa);
|
||||
device->handle_memory_access(_vm.state());
|
||||
_vm.state()->ip += sizeof(Genode::addr_t);
|
||||
_vm.state().ip += sizeof(Genode::addr_t);
|
||||
}
|
||||
|
||||
void _handle_wfi()
|
||||
{
|
||||
if (_vm.state()->hsr & 1)
|
||||
if (_vm.state().hsr & 1)
|
||||
throw Vm::Exception("WFE not implemented yet");
|
||||
|
||||
_vm.wait_for_interrupt();
|
||||
_timer.schedule_timeout();
|
||||
_vm.state()->ip += sizeof(Genode::addr_t);
|
||||
_vm.state().ip += sizeof(Genode::addr_t);
|
||||
}
|
||||
|
||||
void _handle_trap()
|
||||
{
|
||||
/* check device number*/
|
||||
switch (Hsr::Ec::get(_vm.state()->hsr)) {
|
||||
switch (Hsr::Ec::get(_vm.state().hsr)) {
|
||||
case Hsr::Ec::HVC:
|
||||
_handle_hyper_call();
|
||||
break;
|
||||
|
|
@ -1262,18 +1290,46 @@ class Vmm
|
|||
return;
|
||||
default:
|
||||
throw Vm::Exception("Unknown trap: %x",
|
||||
Hsr::Ec::get(_vm.state()->hsr));
|
||||
Hsr::Ec::get(_vm.state().hsr));
|
||||
};
|
||||
}
|
||||
|
||||
void _handle_vm(unsigned num)
|
||||
void _handle() {} /* dummy handler */
|
||||
|
||||
public:
|
||||
|
||||
Vmm(Genode::Env & env)
|
||||
: _vm_handler(*this, env.ep(), *this, &Vmm::_handle),
|
||||
_vm("linux", "dtb", 1024 * 1024 * 128, _vm_handler, env),
|
||||
_cp15(_vm.state()),
|
||||
_gic ("Gic", 0x2c001000, 0x2000, _vm),
|
||||
_timer ("Timer", 0x2a430000, 0x1000, *this, env, _gic),
|
||||
_sys_regs ("System Register", 0x1c010000, 0x1000, _vm, env),
|
||||
_uart ("Pl011", 0x1c090000, 0x1000, *this, env, _gic)
|
||||
{
|
||||
_device_tree.insert(&_gic);
|
||||
_device_tree.insert(&_sys_regs);
|
||||
_device_tree.insert(&_uart);
|
||||
|
||||
Genode::log("Start virtual machine ...");
|
||||
|
||||
_vm.start();
|
||||
_vm.run();
|
||||
};
|
||||
|
||||
Vm & vm() { return _vm; }
|
||||
|
||||
template <typename FUNC>
|
||||
void handle_vm(FUNC handler)
|
||||
{
|
||||
if (_vm.active()) {
|
||||
|
||||
_vm.pause();
|
||||
|
||||
enum { IRQ = 6, TRAP = 8 };
|
||||
|
||||
/* check exception reason */
|
||||
switch (_vm.state()->cpu_exception) {
|
||||
switch (_vm.state().cpu_exception) {
|
||||
case IRQ:
|
||||
_gic.irq_occured();
|
||||
break;
|
||||
|
|
@ -1284,53 +1340,12 @@ class Vmm
|
|||
throw Vm::Exception("Curious exception occured");
|
||||
}
|
||||
}
|
||||
|
||||
handler();
|
||||
|
||||
if (_vm.active()) _vm.run();
|
||||
}
|
||||
|
||||
public:
|
||||
|
||||
Vmm()
|
||||
: _vm_handler(_sig_rcv, *this, &Vmm::_handle_vm),
|
||||
_vm("linux", "dtb", 1024 * 1024 * 128, _vm_handler),
|
||||
_cp15(_vm.state()),
|
||||
_gic ("Gic", 0x2c001000, 0x2000, &_vm),
|
||||
_timer ("Timer", 0x2a430000, 0x1000, &_vm, _sig_rcv, _gic),
|
||||
_sys_regs ("System Register", 0x1c010000, 0x1000, &_vm),
|
||||
_uart ("Pl011", 0x1c090000, 0x1000, &_vm, _sig_rcv, _gic) { }
|
||||
|
||||
void run()
|
||||
{
|
||||
using Signal_dispatcher = Genode::Signal_dispatcher_base;
|
||||
|
||||
_device_tree.insert(&_gic);
|
||||
_device_tree.insert(&_sys_regs);
|
||||
_device_tree.insert(&_uart);
|
||||
_vm.start();
|
||||
|
||||
while (true) {
|
||||
if (_vm.active()) _vm.run();
|
||||
Genode::Signal s = _sig_rcv.wait_for_signal();
|
||||
if (_vm.active() && &_vm_handler != static_cast<Signal_dispatcher*>(s.context())) {
|
||||
_vm.pause();
|
||||
_handle_vm(1);
|
||||
}
|
||||
static_cast<Signal_dispatcher*>(s.context())->dispatch(s.num());
|
||||
}
|
||||
};
|
||||
|
||||
void dump() { _vm.dump(); }
|
||||
};
|
||||
|
||||
int main()
|
||||
{
|
||||
static Vmm vmm;
|
||||
|
||||
try {
|
||||
Genode::log("Start virtual machine ...");
|
||||
vmm.run();
|
||||
} catch(Vm::Exception &e) {
|
||||
e.print();
|
||||
vmm.dump();
|
||||
return -1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
void Component::construct(Genode::Env & env) { static Vmm vmm(env); }
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
TARGET = vmm
|
||||
REQUIRES = hw_arndale
|
||||
REQUIRES = arndale hw
|
||||
LIBS = base
|
||||
SRC_CC = main.cc
|
||||
INC_DIR += $(PRG_DIR)
|
||||
|
|
|
|||
Loading…
Reference in New Issue