foc: Use git for contrib preparation
Download Fiasco.OC/L4RE from our 'GitHub' fork. Deleted all patches.
This commit is contained in:
Sebastian Sumpf
Norman Feske
parent
a61bd71a4f
commit
0ef936a1a0
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@ -1,15 +1,17 @@
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#
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# \brief Checkout Fiasco.OC and addtional needed tools (sigma0, bootstrap)
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# \author Stefan Kalkowski
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# \author Sebastian Sumpf
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# \date 2011-03-31
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#
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VERBOSE ?= @
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ECHO = @echo
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SVN_URI = http://svn.tudos.org/repos/oc/tudos/trunk
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SVN_REV = 40
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GIT_URI = http://github.com/ssumpf/foc.git
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GIT_BRANCH = r40
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CONTRIB_DIR = contrib
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PATCHES = $(shell find patches -name *.patch)
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GNU_FIND ?= find
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SVN_TARGETS = tools/preprocess \
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kernel/fiasco \
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@ -37,22 +39,35 @@ SVN_TARGETS = tools/preprocess \
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#
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check_tool = $(if $(shell which $(1)),,$(error Need to have '$(1)' installed.))
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$(call check_tool,patch)
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$(call check_tool,svn)
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$(call check_tool,git)
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$(call check_tool,$(GNU_FIND))
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#
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# Print help information by default
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#
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help::
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# realpath is there to follow symlink; if contrib dir does not exists yet,
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# create new directory
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REAL_CONTRIB_DIR := $(realpath $(CONTRIB_DIR))
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ifeq ($(REAL_CONTRIB_DIR),)
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REAL_CONTRIB_DIR := $(CONTRIB_DIR)
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endif
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$(CONTRIB_DIR)/.git:
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$(VERBOSE)git clone $(GIT_URI) $(CONTRIB_DIR)
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prepare: $(REAL_CONTRIB_DIR)/.svn update_contrib_subdirs apply_patches
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prepare: $(CONTRIB_DIR)/.git
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$(VERBOSE)cd $(CONTRIB_DIR); git fetch origin
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$(VERBOSE)cd $(CONTRIB_DIR); git checkout $(GIT_BRANCH)
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$(VERBOSE)cd $(CONTRIB_DIR); git rebase origin/$(GIT_BRANCH)
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$(SVN_REV)/%:
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$(VERBOSE)svn co -r $(SVN_REV) $(SVN_URI)/$* $@
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checkout_base:
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ifeq ($(SVN_REV),)
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$(error Syntax 'make checkout SVN_REV=<revision>')
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endif
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$(VERBOSE)svn co -r $(SVN_REV) --depth immediates $(SVN_URI) $(SVN_REV)
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$(VERBOSE)svn co -r $(SVN_REV) --depth files $(SVN_URI)/l4 $(SVN_REV)/l4
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$(VERBOSE)svn co -r $(SVN_REV) --depth files $(SVN_URI)/l4/pkg $(SVN_REV)/l4/pkg
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checkout: checkout_base $(addprefix $(SVN_REV)/,$(SVN_TARGETS))
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$(VERBOSE)$(GNU_FIND) $(SVN_REV) -depth -name .svn -type d -exec rm -r {} ";"
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help::
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$(ECHO)
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@ -61,47 +76,12 @@ help::
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$(ECHO) "The source code will be located at the '$(CONTRIB_DIR)/' directory."
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$(ECHO)
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$(ECHO) "--- available commands ---"
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$(ECHO) "prepare - checkout upstream source codes"
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$(ECHO) "clean - remove upstream source codes"
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$(ECHO) "prepare - checkout upstream source codes"
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$(ECHO) "checkout SVN_REV=<rev> - checkout out <rev> revision of Fiasco.OC/L4RE from the official repositiry"
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$(ECHO) " and store in directory <rev>"
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$(ECHO) "clean - remove upstream source codes"
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$(ECHO)
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$(CONTRIB_DIR):
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$(VERBOSE)mkdir -p $@
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# use '.svn' subdirectory as rule to enable the use of a symbolic link as
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# contrib directory
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$(REAL_CONTRIB_DIR)/.svn: $(CONTRIB_DIR)
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$(VERBOSE)svn co -r $(SVN_REV) --depth immediates $(SVN_URI) $(dir $@)
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$(VERBOSE)svn co -r $(SVN_REV) --depth files $(SVN_URI)/l4 $(dir $@)/l4
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$(VERBOSE)svn co -r $(SVN_REV) --depth files $(SVN_URI)/l4/pkg $(dir $@)/l4/pkg
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# used phony to always update the SVN on 'make prepare'
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# (before updating, we need to revert our custom patches)
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update_contrib_subdirs: $(addprefix $(REAL_CONTRIB_DIR)/,$(SVN_TARGETS))
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$(ECHO) "updating . to revision $(SVN_REV)"
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$(VERBOSE)svn revert $(REAL_CONTRIB_DIR)
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$(VERBOSE)svn up -r $(SVN_REV) -N $(REAL_CONTRIB_DIR)/
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$(ECHO) "updating l4 to revision $(SVN_REV)"
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$(VERBOSE)svn revert $(REAL_CONTRIB_DIR)/l4
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$(VERBOSE)svn up -r $(SVN_REV) -N $(REAL_CONTRIB_DIR)/l4
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$(ECHO) "updating l4/pkg to revision $(SVN_REV)"
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$(VERBOSE)svn revert $(REAL_CONTRIB_DIR)/l4/pkg
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$(VERBOSE)svn up -r $(SVN_REV) -N $(REAL_CONTRIB_DIR)/l4/pkg
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$(VERBOSE)for i in $(SVN_TARGETS); do \
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echo "updating $$i to revision $(SVN_REV)"; \
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svn revert -R $(REAL_CONTRIB_DIR)/$$i; \
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svn up -r $(SVN_REV) $(REAL_CONTRIB_DIR)/$$i; done
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# for resolving the dependencies of 'update_contrib_subdirs'
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$(REAL_CONTRIB_DIR)/%:
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$(VERBOSE)svn co -r $(SVN_REV) $(SVN_URI)/$* $@
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apply_patches:
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$(ECHO) "applying patches to '$(REAL_CONTRIB_DIR)/'"
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$(VERBOSE)for i in $(PATCHES); do \
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patch -N -d $(REAL_CONTRIB_DIR) -p0 < $$i; done
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# if $(CONTRIB_DIR) is a symlink, leave $(REAL_CONTRIB_DIR) alone
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clean::
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$(VERBOSE)rm -rf $(CONTRIB_DIR)
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@ -1,20 +0,0 @@
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The patches in this directory are modifications of the Fiasco.OC kernel
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required for using this kernel with Genode.
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:'foc_single_step_x86.patch':
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This patch enables the user land to use the CPU's single stepping mode on
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x86_32 platforms. It is needed to enable the use of GDB monitor for
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user-level debugging.
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:'fix_exception_ip.patch':
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On the occurrence of undefined-instruction exceptions on ARM, Fiasco.OC
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reports a wrong program-counter value to the exception handler. The patch
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fixes the problem.
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:'jdb_kobject_names.patch':
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This patch increases the size of the JDB kernel object names buffer. The
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original size was too small for some Genode scenarios and caused missing
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thread names in the kernel debugger thread list.
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@ -1,15 +0,0 @@
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Index: kernel/fiasco/src/kern/arm/thread-arm.cpp
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===================================================================
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--- kernel/fiasco/src/kern/arm/thread-arm.cpp (revision 38)
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+++ kernel/fiasco/src/kern/arm/thread-arm.cpp (working copy)
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@@ -258,6 +258,10 @@
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&& handle_copro_fault[copro](opcode, ts))
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return;
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}
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+
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+ /* check for ARM default GDB breakpoint */
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+ if (!(ts->psr & Proc::Status_thumb) && opcode == 0xe7ffdefe)
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+ ts->pc -= 4;
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}
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undef_insn:
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@ -1,42 +0,0 @@
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Index: kernel/fiasco/src/kern/arm/cpu-arm.cpp
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===================================================================
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--- kernel/fiasco/src/kern/arm/cpu-arm.cpp (revision 40)
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+++ kernel/fiasco/src/kern/arm/cpu-arm.cpp (working copy)
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@@ -428,9 +428,15 @@
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void Cpu::init_errata_workarounds() {}
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//---------------------------------------------------------------------------
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-IMPLEMENTATION [arm && armv6plus]:
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+IMPLEMENTATION [arm && armv6plus && omap4_pandaboard]:
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PRIVATE static inline
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+void Cpu::init_errata_workarounds() {}
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+
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+//---------------------------------------------------------------------------
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+IMPLEMENTATION [arm && armv6plus && !omap4_pandaboard]:
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+
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+PRIVATE static inline
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void
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Cpu::set_actrl(Mword bit_mask)
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{
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@@ -494,8 +500,8 @@
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if (rev == 0x20 || rev == 0x21 || rev == 0x22)
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set_c15_c0_1((1 << 12) | (1 << 22));
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- // errata: 743622
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- if ((rev & 0xf0) == 0x20)
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+ // errata: 743622 (r2p0 - r2p2)
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+ if ((rev & 0xf0) == 0x20 && (rev & 0xf) < 0x3)
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set_c15_c0_1(1 << 6);
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// errata: 751472
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@@ -505,6 +511,9 @@
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}
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}
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+//---------------------------------------------------------------------------
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+IMPLEMENTATION [arm && armv6plus]:
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+
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IMPLEMENT
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void
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Cpu::id_init()
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@ -1,20 +0,0 @@
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Index: kernel/fiasco/src/kern/task.cpp
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===================================================================
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--- kernel/fiasco/src/kern/task.cpp (revision 40)
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+++ kernel/fiasco/src/kern/task.cpp (working copy)
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@@ -488,10 +488,12 @@
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if (obj_a.special() || obj_b.special())
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return commit_result(obj_a.special_cap() == obj_b.special_cap());
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- Obj_space::Capability c_a = lookup(obj_a.cap());
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- Obj_space::Capability c_b = lookup(obj_b.cap());
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+ Kobject_iface* ki_a = lookup(obj_a.cap()).obj();
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+ Kobject_iface* ki_b = lookup(obj_b.cap()).obj();
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+ Address a_a = ki_a ? ki_a->kobject_start_addr() : 0;
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+ Address a_b = ki_b ? ki_b->kobject_start_addr() : 0;
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- return commit_result(c_a == c_b);
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+ return commit_result(a_a == a_b);
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}
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PRIVATE inline NOEXPORT
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@ -1,26 +0,0 @@
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Index: kernel/fiasco/src/kern/ia32/thread-ia32.cpp
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===================================================================
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--- kernel/fiasco/src/kern/ia32/thread-ia32.cpp (revision 38)
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+++ kernel/fiasco/src/kern/ia32/thread-ia32.cpp (working copy)
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@@ -90,7 +90,7 @@
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IMPLEMENT inline
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Mword
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Thread::user_flags() const
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-{ return regs()->flags(); }
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+{ return state() & Thread_ready; }
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Index: kernel/fiasco/src/kern/arm/thread-arm.cpp
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===================================================================
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--- kernel/fiasco/src/kern/arm/thread-arm.cpp (revision 38)
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+++ kernel/fiasco/src/kern/arm/thread-arm.cpp (working copy)
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@@ -361,7 +361,7 @@
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IMPLEMENT inline
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Mword
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Thread::user_flags() const
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-{ return 0; }
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+{ return state() & Thread_ready; }
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IMPLEMENT inline NEEDS[Thread::exception_triggered]
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void
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@ -1,223 +0,0 @@
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Index: kernel/fiasco/src/Kconfig
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===================================================================
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--- kernel/fiasco/src/Kconfig (revision 40)
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+++ kernel/fiasco/src/Kconfig (working copy)
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@@ -685,6 +685,14 @@
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prevent some P4 processors from being overheated. This option
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requires a working timer IRQ to wakeup getchar periodically.
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+config USER_SINGLE_STEP
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+ bool "Enable user level single stepping support"
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+ depends on IA32
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+ default n
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+ help
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+ This option enables single stepping of user level applications outside of
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+ JDB.
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+
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choice
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prompt "Warn levels"
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default WARN_WARNING
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Index: kernel/fiasco/src/kern/ia32/config-ia32.cpp
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===================================================================
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--- kernel/fiasco/src/kern/ia32/config-ia32.cpp (revision 40)
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+++ kernel/fiasco/src/kern/ia32/config-ia32.cpp (working copy)
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@@ -86,6 +86,12 @@
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// static const bool hlt_works_ok = false;
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static bool hlt_works_ok;
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+#ifdef CONFIG_USER_SINGLE_STEP
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+ static const bool user_single_step = true;
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+#else
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+ static const bool user_single_step = false;
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+#endif
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+
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// the default uart to use for serial console
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static const unsigned default_console_uart = 1;
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static const unsigned default_console_uart_baudrate = 115200;
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Index: kernel/fiasco/src/kern/ia32/32/entry-native.S
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===================================================================
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--- kernel/fiasco/src/kern/ia32/32/entry-native.S (revision 40)
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+++ kernel/fiasco/src/kern/ia32/32/entry-native.S (working copy)
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@@ -46,6 +46,30 @@
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jmp slowtraps
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.endm
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+#ifdef CONFIG_USER_SINGLE_STEP
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+.macro HANDLE_USER_TRAP1
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+ /* Save EFLAGS, this may trap if user task had single stepping activated
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+ * test for single stepping
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+ */
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+ pushf
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+ addl $4, %esp
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+ testl $EFLAGS_TF, -4(%esp)
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+.endm
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+
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+.macro RESTORE_USER_TRAP1
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+ /* Restore single stepping if it has been set */
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+ je 1f
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+ orl $EFLAGS_TF, (%esp)
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+1:
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+.endm
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+#else
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+.macro HANDLE_USER_TRAP1
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+.endm
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+
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+.macro RESTORE_USER_TRAP1
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+.endm
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+#endif
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+
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.p2align 4
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.globl entry_vec01_debug
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entry_vec01_debug:
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@@ -59,6 +83,15 @@
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cmpl $entry_sys_fast_ipc_log, (%esp)
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je 2f
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#endif
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+
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+ /* test if trap was raised within kernel */
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+ testl $3, 4(%esp)
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+ jne 1f
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+
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+ /* turn of EFLAGS.TF */
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+ btrl $7, 8(%esp)
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+ iret
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+
|
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1: pushl $0
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pushl $1
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pusha
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@@ -227,11 +260,17 @@
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.p2align(4)
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.global entry_sys_fast_ipc_c
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entry_sys_fast_ipc_c:
|
||||
+
|
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+ HANDLE_USER_TRAP1
|
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+
|
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pop %esp
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pushl $(GDT_DATA_USER|SEL_PL_U) /* user ss */
|
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pushl %ebp // push user SP (get in ebp)
|
||||
// Fake user eflags, set IOPL to 3
|
||||
pushl $(EFLAGS_IOPL_U | EFLAGS_IF)
|
||||
+
|
||||
+ RESTORE_USER_TRAP1
|
||||
+
|
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cld
|
||||
// Fake user cs. This cs value is never used with exception
|
||||
// that the thread is ex_regs'd before we leave with sysexit.
|
||||
Index: kernel/fiasco/src/kern/ia32/thread-ia32.cpp
|
||||
===================================================================
|
||||
--- kernel/fiasco/src/kern/ia32/thread-ia32.cpp (revision 40)
|
||||
+++ kernel/fiasco/src/kern/ia32/thread-ia32.cpp (working copy)
|
||||
@@ -189,6 +189,10 @@
|
||||
goto generic_debug;
|
||||
}
|
||||
|
||||
+ if (Config::user_single_step && ts->_trapno == 1 && from_user)
|
||||
+ if (send_exception(ts))
|
||||
+ goto success;
|
||||
+
|
||||
if (from_user && _space.user_mode())
|
||||
{
|
||||
if (ts->_trapno == 14 && Kmem::is_io_bitmap_page_fault(ts->_cr2))
|
||||
@@ -438,7 +442,8 @@
|
||||
// thread (not alien) and it's a debug trap,
|
||||
// debug traps for aliens are always reflected as exception IPCs
|
||||
if (!(state() & Thread_alien)
|
||||
- && (ts->_trapno == 1 || ts->_trapno == 3))
|
||||
+ && ((ts->_trapno == 1 && !Config::user_single_step)
|
||||
+ || ts->_trapno == 3))
|
||||
return 0; // we do not handle this
|
||||
|
||||
if (ts->_trapno == 3)
|
||||
@@ -491,6 +496,11 @@
|
||||
}
|
||||
}
|
||||
|
||||
+IMPLEMENT inline
|
||||
+void
|
||||
+Thread::user_single_step(bool)
|
||||
+{}
|
||||
+
|
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//----------------------------------------------------------------------------
|
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IMPLEMENTATION [(ia32,amd64,ux) && !io]:
|
||||
|
||||
@@ -819,3 +829,16 @@
|
||||
int
|
||||
Thread::call_nested_trap_handler(Trap_state *)
|
||||
{ return -1; }
|
||||
+
|
||||
+//---------------------------------------------------------------------------
|
||||
+IMPLEMENTATION [ia32]:
|
||||
+
|
||||
+IMPLEMENT inline
|
||||
+void
|
||||
+Thread::user_single_step(bool enable)
|
||||
+{
|
||||
+ if (!Config::user_single_step)
|
||||
+ return;
|
||||
+
|
||||
+ regs()->flags(enable ? user_flags() | EFLAGS_TF : user_flags() & ~EFLAGS_TF);
|
||||
+}
|
||||
Index: kernel/fiasco/src/kern/thread_object.cpp
|
||||
===================================================================
|
||||
--- kernel/fiasco/src/kern/thread_object.cpp (revision 40)
|
||||
+++ kernel/fiasco/src/kern/thread_object.cpp (working copy)
|
||||
@@ -520,6 +520,8 @@
|
||||
if (o_ip) *o_ip = user_ip();
|
||||
if (o_flags) *o_flags = user_flags();
|
||||
|
||||
+ (ops & Exr_single_step) ? user_single_step(true) : user_single_step(false);
|
||||
+
|
||||
// Changing the run state is only possible when the thread is not in
|
||||
// an exception.
|
||||
if (!(ops & Exr_cancel) && (state() & Thread_in_exception))
|
||||
Index: kernel/fiasco/src/kern/thread.cpp
|
||||
===================================================================
|
||||
--- kernel/fiasco/src/kern/thread.cpp (revision 40)
|
||||
+++ kernel/fiasco/src/kern/thread.cpp (working copy)
|
||||
@@ -72,6 +72,7 @@
|
||||
{
|
||||
Exr_cancel = 0x10000,
|
||||
Exr_trigger_exception = 0x20000,
|
||||
+ Exr_single_step = 0x40000,
|
||||
};
|
||||
|
||||
enum Vcpu_ctl_flags
|
||||
@@ -139,6 +140,8 @@
|
||||
|
||||
inline Mword user_flags() const;
|
||||
|
||||
+ inline void user_single_step(bool);
|
||||
+
|
||||
/** nesting level in debugger (always critical) if >1 */
|
||||
static Per_cpu<unsigned long> nested_trap_recover;
|
||||
static void handle_remote_requests_irq() asm ("handle_remote_cpu_requests");
|
||||
Index: kernel/fiasco/src/kern/arm/thread-arm.cpp
|
||||
===================================================================
|
||||
--- kernel/fiasco/src/kern/arm/thread-arm.cpp (revision 40)
|
||||
+++ kernel/fiasco/src/kern/arm/thread-arm.cpp (working copy)
|
||||
@@ -590,6 +590,10 @@
|
||||
return (v[insn >> 28] >> (psr >> 28)) & 1;
|
||||
}
|
||||
|
||||
+IMPLEMENT inline
|
||||
+void Thread::user_single_step(bool)
|
||||
+{}
|
||||
+
|
||||
// ------------------------------------------------------------------------
|
||||
IMPLEMENTATION [arm && armv6plus]:
|
||||
|
||||
Index: kernel/fiasco/src/kern/ppc32/thread-ppc32.cpp
|
||||
===================================================================
|
||||
--- kernel/fiasco/src/kern/ppc32/thread-ppc32.cpp (revision 40)
|
||||
+++ kernel/fiasco/src/kern/ppc32/thread-ppc32.cpp (working copy)
|
||||
@@ -308,6 +308,10 @@
|
||||
}
|
||||
}
|
||||
|
||||
+IMPLEMENT inline
|
||||
+void Thread::user_single_step(bool)
|
||||
+{}
|
||||
+
|
||||
PUBLIC inline NEEDS ["trap_state.h"]
|
||||
int
|
||||
Thread::send_exception_arch(Trap_state * /*ts*/)
|
||||
|
|
@ -1,231 +0,0 @@
|
|||
From ea7d759fa88778f0f481fbecac3077b8f474527f Mon Sep 17 00:00:00 2001
|
||||
From: Nikolay Golikov <decaprox@gmail.com>
|
||||
Date: Tue, 4 Sep 2012 17:51:47 +0400
|
||||
Subject: [PATCH] Added Freescale i.MX53 platform support
|
||||
|
||||
---
|
||||
src/kernel/fiasco/src/kern/arm/bsp/imx/Kconfig | 8 ++++++
|
||||
src/kernel/fiasco/src/kern/arm/bsp/imx/Modules | 5 ++++
|
||||
.../src/kern/arm/bsp/imx/bootstrap-arm-imx.cpp | 2 +-
|
||||
.../fiasco/src/kern/arm/bsp/imx/config-arm-imx.cpp | 4 +++
|
||||
.../src/kern/arm/bsp/imx/mem_layout-arm-imx.cpp | 26 ++++++++++++++++++++
|
||||
.../fiasco/src/kern/arm/bsp/imx/pic-arm-imx51.cpp | 4 +--
|
||||
.../fiasco/src/kern/arm/bsp/imx/reset-arm-imx.cpp | 2 +-
|
||||
.../src/kern/arm/bsp/imx/timer-arm-imx_epit.cpp | 2 +-
|
||||
.../fiasco/src/kern/arm/bsp/imx/uart-imx.cpp | 4 +--
|
||||
src/l4/pkg/bootstrap/server/src/Make.rules | 1 +
|
||||
src/l4/pkg/bootstrap/server/src/platform/imx.cc | 3 +++
|
||||
11 files changed, 54 insertions(+), 7 deletions(-)
|
||||
|
||||
diff --git kernel/fiasco/src/kern/arm/bsp/imx/Kconfig kernel/fiasco/src/kern/arm/bsp/imx/Kconfig
|
||||
index 6348b4f..61e090d 100644
|
||||
--- kernel/fiasco/src/kern/arm/bsp/imx/Kconfig
|
||||
+++ kernel/fiasco/src/kern/arm/bsp/imx/Kconfig
|
||||
@@ -25,6 +25,13 @@ config PF_IMX_51
|
||||
help
|
||||
Choose for i.MX51
|
||||
|
||||
+config PF_IMX_53
|
||||
+ bool "i.MX53"
|
||||
+ depends on PF_IMX
|
||||
+ select CAN_ARM_CPU_CORTEX_A8
|
||||
+ help
|
||||
+ Choose for i.MX53
|
||||
+
|
||||
endchoice
|
||||
|
||||
config PF_IMX_RAM_PHYS_BASE
|
||||
@@ -32,3 +39,4 @@ config PF_IMX_RAM_PHYS_BASE
|
||||
default 0xc0000000 if PF_IMX_21
|
||||
default 0x80000000 if PF_IMX_35
|
||||
default 0x90000000 if PF_IMX_51
|
||||
+ default 0x70000000 if PF_IMX_53
|
||||
diff --git kernel/fiasco/src/kern/arm/bsp/imx/Modules kernel/fiasco/src/kern/arm/bsp/imx/Modules
|
||||
index 7f3021f..78b1ed2 100644
|
||||
--- kernel/fiasco/src/kern/arm/bsp/imx/Modules
|
||||
+++ kernel/fiasco/src/kern/arm/bsp/imx/Modules
|
||||
@@ -7,9 +7,12 @@ PREPROCESS_PARTS += $(if $(CONFIG_PF_IMX_21),imx21 kern_start_0xd)
|
||||
PREPROCESS_PARTS += $(if $(CONFIG_PF_IMX_35),imx35 imx_epit)
|
||||
PREPROCESS_PARTS += $(if $(CONFIG_PF_IMX_51),imx51 imx_epit \
|
||||
pic_gic pic_gic_mxc_tzic)
|
||||
+PREPROCESS_PARTS += $(if $(CONFIG_PF_IMX_53),imx53 imx_epit \
|
||||
+ pic_gic pic_gic_mxc_tzic)
|
||||
CONFIG_KERNEL_LOAD_ADDR := $(CONFIG_PF_IMX_RAM_PHYS_BASE)
|
||||
|
||||
INTERFACES_KERNEL += $(if $(CONFIG_PF_IMX_51),gic)
|
||||
+INTERFACES_KERNEL += $(if $(CONFIG_PF_IMX_53),gic)
|
||||
|
||||
uart_IMPL += uart-imx
|
||||
config_IMPL += config-arm-imx
|
||||
@@ -17,10 +20,12 @@ mem_layout_IMPL += mem_layout-arm-imx
|
||||
pic_IMPL += $(if $(CONFIG_PF_IMX_21),pic-arm-imx)
|
||||
pic_IMPL += $(if $(CONFIG_PF_IMX_35),pic-arm-imx)
|
||||
pic_IMPL += $(if $(CONFIG_PF_IMX_51),pic-gic pic-arm-imx51)
|
||||
+pic_IMPL += $(if $(CONFIG_PF_IMX_53),pic-gic pic-arm-imx51)
|
||||
bootstrap_IMPL += bootstrap-arm-imx
|
||||
timer_IMPL += $(if $(CONFIG_PF_IMX_21),timer-arm-imx21)
|
||||
timer_IMPL += $(if $(CONFIG_PF_IMX_35),timer-arm-imx_epit)
|
||||
timer_IMPL += $(if $(CONFIG_PF_IMX_51),timer-arm-imx_epit)
|
||||
+timer_IMPL += $(if $(CONFIG_PF_IMX_53),timer-arm-imx_epit)
|
||||
timer_tick_IMPL += timer_tick-single-vector
|
||||
kernel_uart_IMPL += kernel_uart-arm-imx
|
||||
reset_IMPL += reset-arm-imx
|
||||
diff --git kernel/fiasco/src/kern/arm/bsp/imx/bootstrap-arm-imx.cpp kernel/fiasco/src/kern/arm/bsp/imx/bootstrap-arm-imx.cpp
|
||||
index b3023a8..427abc8 100644
|
||||
--- kernel/fiasco/src/kern/arm/bsp/imx/bootstrap-arm-imx.cpp
|
||||
+++ kernel/fiasco/src/kern/arm/bsp/imx/bootstrap-arm-imx.cpp
|
||||
@@ -25,7 +25,7 @@ enum {
|
||||
}
|
||||
|
||||
//-----------------------------------------------------------------------------
|
||||
-IMPLEMENTATION [arm && imx51]:
|
||||
+IMPLEMENTATION [arm && (imx51 || imx53)]:
|
||||
void
|
||||
map_hw(void *pd)
|
||||
{
|
||||
diff --git kernel/fiasco/src/kern/arm/bsp/imx/config-arm-imx.cpp kernel/fiasco/src/kern/arm/bsp/imx/config-arm-imx.cpp
|
||||
index d431214..ef19534 100644
|
||||
--- kernel/fiasco/src/kern/arm/bsp/imx/config-arm-imx.cpp
|
||||
+++ kernel/fiasco/src/kern/arm/bsp/imx/config-arm-imx.cpp
|
||||
@@ -9,3 +9,7 @@
|
||||
INTERFACE [arm && imx51]:
|
||||
|
||||
#define TARGET_NAME "i.MX51"
|
||||
+
|
||||
+INTERFACE [arm && imx53]:
|
||||
+
|
||||
+#define TARGET_NAME "i.MX53"
|
||||
diff --git kernel/fiasco/src/kern/arm/bsp/imx/mem_layout-arm-imx.cpp kernel/fiasco/src/kern/arm/bsp/imx/mem_layout-arm-imx.cpp
|
||||
index b86b2b0..5d44072 100644
|
||||
--- kernel/fiasco/src/kern/arm/bsp/imx/mem_layout-arm-imx.cpp
|
||||
+++ kernel/fiasco/src/kern/arm/bsp/imx/mem_layout-arm-imx.cpp
|
||||
@@ -90,3 +90,29 @@
|
||||
Gic_dist_phys_base = 0xe0000000,
|
||||
};
|
||||
};
|
||||
+
|
||||
+
|
||||
+INTERFACE [arm && imx && imx53]: // ---------------------------------------
|
||||
+
|
||||
+EXTENSION class Mem_layout
|
||||
+{
|
||||
+public:
|
||||
+ enum Virt_layout_imx53 {
|
||||
+ Timer_map_base = 0xef1ac000,
|
||||
+ Uart_map_base = 0xef1bc000,
|
||||
+ Watchdog_map_base = 0xef198000,
|
||||
+ Gic_cpu_map_base = 0,
|
||||
+ Gic_dist_map_base = 0xef2fc000,
|
||||
+ Uart_base = Uart_map_base,
|
||||
+ };
|
||||
+
|
||||
+ enum Phys_layout_imx53 {
|
||||
+ Device_phys_base_1 = 0x53f00000,
|
||||
+ Device_phys_base_2 = 0x0ff00000,
|
||||
+
|
||||
+ Watchdog_phys_base = 0x53f98000, // wdog1
|
||||
+ Timer_phys_base = 0x53fac000, // epit1
|
||||
+ Uart_phys_base = 0x53fbc000, // uart1
|
||||
+ Gic_dist_phys_base = 0x0fffc000,
|
||||
+ };
|
||||
+};
|
||||
diff --git kernel/fiasco/src/kern/arm/bsp/imx/pic-arm-imx51.cpp kernel/fiasco/src/kern/arm/bsp/imx/pic-arm-imx51.cpp
|
||||
index 02ec945..e4ae3ef 100644
|
||||
--- kernel/fiasco/src/kern/arm/bsp/imx/pic-arm-imx51.cpp
|
||||
+++ kernel/fiasco/src/kern/arm/bsp/imx/pic-arm-imx51.cpp
|
||||
@@ -1,9 +1,9 @@
|
||||
-INTERFACE [arm && pic_gic && imx51]:
|
||||
+INTERFACE [arm && pic_gic && (imx51 || imx53)]:
|
||||
|
||||
#include "gic.h"
|
||||
|
||||
// ------------------------------------------------------------------------
|
||||
-IMPLEMENTATION [arm && pic_gic && imx51]:
|
||||
+IMPLEMENTATION [arm && pic_gic && (imx51 || imx53)]:
|
||||
|
||||
#include "irq_mgr_multi_chip.h"
|
||||
#include "kmem.h"
|
||||
diff --git kernel/fiasco/src/kern/arm/bsp/imx/reset-arm-imx.cpp kernel/fiasco/src/kern/arm/bsp/imx/reset-arm-imx.cpp
|
||||
index 7e7776f..e3f9277 100644
|
||||
--- kernel/fiasco/src/kern/arm/bsp/imx/reset-arm-imx.cpp
|
||||
+++ kernel/fiasco/src/kern/arm/bsp/imx/reset-arm-imx.cpp
|
||||
@@ -25,7 +25,7 @@ void __attribute__ ((noreturn))
|
||||
}
|
||||
|
||||
// ------------------------------------------------------------------------
|
||||
-IMPLEMENTATION [arm && (imx35 || imx51)]:
|
||||
+IMPLEMENTATION [arm && (imx35 || imx51 || imx53)]:
|
||||
|
||||
#include "io.h"
|
||||
#include "kmem.h"
|
||||
diff --git kernel/fiasco/src/kern/arm/bsp/imx/timer-arm-imx_epit.cpp kernel/fiasco/src/kern/arm/bsp/imx/timer-arm-imx_epit.cpp
|
||||
index 2231f5a..03f5468 100644
|
||||
--- kernel/fiasco/src/kern/arm/bsp/imx/timer-arm-imx_epit.cpp
|
||||
+++ kernel/fiasco/src/kern/arm/bsp/imx/timer-arm-imx_epit.cpp
|
||||
@@ -39,7 +39,7 @@
|
||||
};
|
||||
|
||||
|
||||
-INTERFACE [arm && imx51]: // ----------------------------------------------
|
||||
+INTERFACE [arm && (imx51 || imx53)]: // ----------------------------------------------
|
||||
|
||||
EXTENSION class Timer
|
||||
{
|
||||
diff --git kernel/fiasco/src/kern/arm/bsp/imx/uart-imx.cpp kernel/fiasco/src/kern/arm/bsp/imx/uart-imx.cpp
|
||||
index 2f55d22..e04ec24 100644
|
||||
--- kernel/fiasco/src/kern/arm/bsp/imx/uart-imx.cpp
|
||||
+++ kernel/fiasco/src/kern/arm/bsp/imx/uart-imx.cpp
|
||||
@@ -25,7 +25,7 @@ IMPLEMENT L4::Uart *Uart::uart()
|
||||
return &uart;
|
||||
}
|
||||
|
||||
-IMPLEMENTATION [imx51]:
|
||||
+IMPLEMENTATION [imx51 || imx53]:
|
||||
|
||||
#include "uart_imx.h"
|
||||
|
||||
@@ -37,7 +37,7 @@ IMPLEMENT L4::Uart *Uart::uart()
|
||||
return &uart;
|
||||
}
|
||||
|
||||
-IMPLEMENTATION [imx21 || imx35 || imx51]:
|
||||
+IMPLEMENTATION [imx21 || imx35 || imx51 || imx53]:
|
||||
|
||||
#include "mem_layout.h"
|
||||
|
||||
diff --git l4/pkg/bootstrap/server/src/Make.rules l4/pkg/bootstrap/server/src/Make.rules
|
||||
index c6760f6..0872102 100644
|
||||
--- l4/pkg/bootstrap/server/src/Make.rules
|
||||
+++ l4/pkg/bootstrap/server/src/Make.rules
|
||||
@@ -75,6 +75,7 @@ SUPPORT_CC_arm-tegra2 := platform/tegra2.cc
|
||||
SUPPORT_CC_arm-imx21 := platform/imx.cc
|
||||
SUPPORT_CC_arm-imx35 := platform/imx.cc
|
||||
SUPPORT_CC_arm-imx51 := platform/imx.cc
|
||||
+SUPPORT_CC_arm-imx53 := platform/imx.cc
|
||||
SUPPORT_CC_arm-om := platform/om.cc
|
||||
SUPPORT_CC_arm-kirkwood := platform/kirkwood.cc
|
||||
DEFAULT_RELOC_arm-imx21 := 0x00200000 # because of blob
|
||||
diff --git l4/pkg/bootstrap/server/src/platform/imx.cc l4/pkg/bootstrap/server/src/platform/imx.cc
|
||||
index 628103e..70d8602 100644
|
||||
--- l4/pkg/bootstrap/server/src/platform/imx.cc
|
||||
+++ l4/pkg/bootstrap/server/src/platform/imx.cc
|
||||
@@ -36,6 +36,9 @@ class Platform_arm_imx : public Platform_single_region_ram
|
||||
#elif defined(PLATFORM_TYPE_imx51)
|
||||
static L4::Io_register_block_mmio r(0x73fbc000);
|
||||
static L4::Uart_imx51 _uart;
|
||||
+#elif defined(PLATFORM_TYPE_imx53)
|
||||
+ static L4::Io_register_block_mmio r(0x53fbc000);
|
||||
+ static L4::Uart_imx51 _uart;
|
||||
#else
|
||||
#error Which platform type?
|
||||
#endif
|
||||
Index: l4/mk/platforms/imx53.conf
|
||||
===================================================================
|
||||
--- l4/mk/platforms/imx53.conf (revision 0)
|
||||
+++ l4/mk/platforms/imx53.conf (revision 0)
|
||||
@@ -0,0 +1,4 @@
|
||||
+PLATFORM_NAME = "Freescale i.MX53"
|
||||
+PLATFORM_ARCH = arm
|
||||
+PLATFORM_RAM_BASE = 0x70000000
|
||||
+PLATFORM_RAM_SIZE_MB = 1024
|
||||
\ No newline at end of file
|
||||
|
|
@ -1,13 +0,0 @@
|
|||
Index: kernel/fiasco/src/jdb/jdb_kobject_names.cpp
|
||||
===================================================================
|
||||
--- kernel/fiasco/src/jdb/jdb_kobject_names.cpp (revision 38)
|
||||
+++ kernel/fiasco/src/jdb/jdb_kobject_names.cpp (working copy)
|
||||
@@ -43,7 +43,7 @@
|
||||
|
||||
enum
|
||||
{
|
||||
- Name_buffer_size = 8192,
|
||||
+ Name_buffer_size = 4*8192,
|
||||
Name_entries = Name_buffer_size / sizeof(Jdb_kobject_name),
|
||||
};
|
||||
|
||||
|
|
@ -1,16 +0,0 @@
|
|||
Index: l4/pkg/sigma0/server/src/ioports_x86.cc
|
||||
===================================================================
|
||||
--- l4/pkg/sigma0/server/src/ioports_x86.cc (revision 40)
|
||||
+++ l4/pkg/sigma0/server/src/ioports_x86.cc (working copy)
|
||||
@@ -39,8 +39,9 @@
|
||||
size = l4_fpage_size(fp) + PORT_SHIFT;
|
||||
|
||||
unsigned long i = io_ports.alloc(Region::bs(port, 1UL << size, t));
|
||||
- if (i == port)
|
||||
+ if (i == port) {
|
||||
a->snd_fpage(l4_iofpage(port >> PORT_SHIFT, size - PORT_SHIFT));
|
||||
- else
|
||||
+ a->tag = l4_msgtag(0, 0, 1, 0);
|
||||
+ } else
|
||||
a->error(L4_ENOMEM);
|
||||
}
|
||||
|
|
@ -1,23 +0,0 @@
|
|||
Index: l4/pkg/sigma0/server/src/init.cc
|
||||
===================================================================
|
||||
--- l4/pkg/sigma0/server/src/init.cc (revision 38)
|
||||
+++ l4/pkg/sigma0/server/src/init.cc (working copy)
|
||||
@@ -27,6 +27,7 @@
|
||||
#include "ioports.h"
|
||||
#include "mem_man_test.h"
|
||||
#include <l4/sys/debugger.h>
|
||||
+#include <l4/sys/scheduler.h>
|
||||
|
||||
/* started as the L4 sigma0 task from crt0.S */
|
||||
|
||||
@@ -61,6 +62,10 @@
|
||||
l4_debugger_set_object_name(L4_BASE_FACTORY_CAP, "root factory");
|
||||
l4_debugger_set_object_name(L4_BASE_THREAD_CAP, "sigma0");
|
||||
|
||||
+ l4_sched_param_t params = l4_sched_param(255);
|
||||
+ l4_scheduler_run_thread(L4_BASE_SCHEDULER_CAP, L4_BASE_THREAD_CAP, ¶ms);
|
||||
+
|
||||
+
|
||||
Page_alloc_base::init();
|
||||
|
||||
init_memory(info);
|
||||
Loading…
Reference in New Issue