Tomasz Gajewski
Christian Helmuth
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efe0887247
commit
0ecc48e6de
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/*
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* \brief Driver for the MINI UART for Rpi3
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* \author Tomasz Gajewski
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* \date 2019-01-30
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*/
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/*
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* Copyright (C) 2011-2017 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#ifndef _INCLUDE__DRIVERS__UART__BCM2835_MINI_H_
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#define _INCLUDE__DRIVERS__UART__BCM2835_MINI_H_
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/* Genode includes */
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#include <util/mmio.h>
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namespace Genode { class Bcm2835_mini_uart; }
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/**
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* Driver base for the PrimeCell UART MINI Revision r1p3
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*/
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class Genode::Bcm2835_mini_uart : Mmio
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{
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protected:
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enum { MAX_BAUD_RATE = 0xfffffff };
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/**
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* Auxiliary Interrupt status
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*/
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struct AuxIrq : public Register<0x00, 32>
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{
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struct MiniUartIrq : Bitfield<0,1> { }; /* read only */
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struct Spi1Irq : Bitfield<1,1> { }; /* read only */
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struct Spi2Irq : Bitfield<2,1> { }; /* read only */
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};
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/**
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* Auxiliary enables
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*/
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struct AuxEnables : public Register<0x04, 32>
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{
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struct MiniUartEnable : Bitfield<0,1> { };
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struct Spi1Enable : Bitfield<1,1> { };
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struct Spi2Enable : Bitfield<2,1> { };
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};
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/**
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* Mini Uart I/O Data
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*/
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struct AuxMuIoReg : public Register<0x40, 32>
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{
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struct TransmitReceive : Bitfield<0,8> { };
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struct DLABLS8BitsBaudrate : Bitfield<0,8> { };
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};
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/**
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* Mini Uart Interrupt Enable
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*/
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struct AuxMuIerReg : public Register<0x44, 32>
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{
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struct EnableReceiveInterrupt : Bitfield<0,1> { };
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struct EnableTransmitInterrupt : Bitfield<1,1> { };
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struct DLABMS8BitsBaudrate : Bitfield<0,8> { };
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};
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/**
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* Mini Uart Interrupt Identify
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*/
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struct AuxMuIirReg : public Register<0x48, 32>
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{
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struct InterruptPending : Bitfield<0,1> { };
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struct InterruptId : Bitfield<1,2> { /* read only */
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enum {
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NO_INTERRUPTS = 0,
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TRANSMIT_HOLDING_REGISTER_EMPTY = 1,
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RECEIVER_HOLDS_VALID_BYTE = 2,
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};
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};
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struct FifoClear : Bitfield<1,2> { /* write only */
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enum {
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CLEAR_RECEIVE_FIFO = 1,
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CLEAR_TRANSMIT_FIFO = 2,
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CLEAR_BOTH_FIFOS = 3,
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};
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};
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};
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/**
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* Mini Uart Line Control
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*/
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struct AuxMuLcrReg : public Register<0x4C, 32>
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{
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struct DataSize : Bitfield<0,1> { };
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struct Break : Bitfield<6,1> { };
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struct DLAB : Bitfield<7,1> { };
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};
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/**
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* Mini Uart Modem Control
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*/
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struct AuxMuMcrReg : public Register<0x50, 32>
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{
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struct RTS : Bitfield<1,1> { };
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};
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/**
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* Mini Uart Line Status
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*/
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struct AuxMuLsrReg : public Register<0x54, 32>
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{
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struct DataReady : Bitfield<0,1> { };
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struct ReceiverOverrun : Bitfield<1,1> { }; /* read/clear only */
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struct TransmitterEmpty : Bitfield<5,1> { }; /* read only */
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struct TransmitterIdle : Bitfield<6,1> { }; /* read only */
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};
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/**
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* Mini Uart Modem Status
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*/
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struct AuxMuMsrReg : public Register<0x58, 32>
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{
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struct CtsStatus : Bitfield<5,1> { }; /* read only */
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};
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/**
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* Mini Uart Scratch
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*/
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struct AuxMuScratch : public Register<0x5C, 32>
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{
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struct Scratch : Bitfield<0,8> { };
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};
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/**
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* Mini Uart Extra Control
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*/
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struct AuxMuCntlReg : public Register<0x60, 32>
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{
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struct ReceiverEnable : Bitfield<0,1> { };
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struct TransmitterEnable : Bitfield<1,1> { };
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struct EnableReceiveAutoFlowRTSControl : Bitfield<2,1> { };
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struct EnableTransmitAutoFlowCTSControl : Bitfield<3,1> { };
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struct RTSAutoFlowLevel : Bitfield<4,2> {
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enum {
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DE_ASSERT_RTS_RECEIVE_FIFO_3 = 0,
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DE_ASSERT_RTS_RECEIVE_FIFO_2 = 1,
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DE_ASSERT_RTS_RECEIVE_FIFO_1 = 2,
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DE_ASSERT_RTS_RECEIVE_FIFO_4 = 3,
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};
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};
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struct RTSAssertLevel : Bitfield<6,1> { };
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struct CTSAssertLevel : Bitfield<7,1> { };
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};
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/**
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* Mini Uart Extra Status
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*/
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struct AuxMuStatReg : public Register<0x64, 32>
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{
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struct SymbolAvailable : Bitfield<0, 1> { }; /* read only */
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struct SpaceAvailable : Bitfield<1, 1> { }; /* read only */
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struct ReceiverIsIdle : Bitfield<2, 1> { }; /* read only */
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struct TransmitterIsIdle : Bitfield<3, 1> { }; /* read only */
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struct ReceiverOverrun : Bitfield<4, 1> { }; /* read only */
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struct TransmitFifoIsFull : Bitfield<5, 1> { }; /* read only */
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struct RTSStatus : Bitfield<6, 1> { }; /* read only */
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struct CTSLine : Bitfield<7, 1> { }; /* read only */
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struct TransmitFifoIsEmpty : Bitfield<8, 1> { }; /* read only */
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struct TransmitterDone : Bitfield<9, 1> { }; /* read only */
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struct ReceiveFifoFillLevel : Bitfield<16,4> { }; /* read only */
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struct TransmitFifoFillLevel : Bitfield<24,4> { }; /* read only */
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};
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/**
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* Mini Uart Baudrate
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*/
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struct AuxMuBaudReg : public Register<0x68, 32>
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{
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struct Baudrate : Bitfield<0,16> { };
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};
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/**
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* Idle until the device is ready for action
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*/
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void _wait_until_ready() {
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do {
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asm volatile("nop");
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} while (!read<AuxMuLsrReg::TransmitterEmpty>()) ;
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}
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public:
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/**
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* Constructor
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* \param base device MMIO base
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* \param clock device reference clock frequency
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* \param baud_rate targeted UART baud rate
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*/
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inline Bcm2835_mini_uart(addr_t const base, uint32_t const clock,
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uint32_t const baud_rate);
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/**
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* Send ASCII char 'c' over the UART interface
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*/
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inline void put_char(char const c);
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};
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Genode::Bcm2835_mini_uart::Bcm2835_mini_uart(addr_t const base,
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uint32_t const clock,
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uint32_t const baud_rate)
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: Mmio(base)
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{
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/* enable UART1, AUX mini uart */
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write<AuxEnables>(read<AuxEnables::MiniUartEnable>() |
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AuxEnables::MiniUartEnable::bits(1));
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write<AuxMuCntlReg>(0);
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write<AuxMuLcrReg>(3);
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write<AuxMuMcrReg>(0);
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write<AuxMuIerReg>(0);
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write<AuxMuIirReg>(0xc6);
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uint32_t const adjusted_br = ((clock / baud_rate) / 8) - 1;
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write<AuxMuBaudReg>(AuxMuBaudReg::Baudrate::bits(adjusted_br));
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write<AuxMuCntlReg>(3);
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_wait_until_ready();
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}
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void Genode::Bcm2835_mini_uart::put_char(char const c)
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{
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_wait_until_ready();
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/* transmit character */
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write<AuxMuIoReg::TransmitReceive>(c);
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_wait_until_ready();
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}
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#endif /* _INCLUDE__DRIVERS__UART__BCM2835_MINI_H_ */
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