From 0b77e8ea627c95ae59f90ca0740d97618364ce16 Mon Sep 17 00:00:00 2001 From: Stefan Kalkowski Date: Wed, 10 Jul 2019 15:00:33 +0200 Subject: [PATCH] hw: consistently move cpu into board namespace Ref #3445 --- repos/base-hw/lib/mk/spec/x86_64/bootstrap-hw-muen.mk | 2 ++ repos/base-hw/src/bootstrap/platform.h | 1 - repos/base-hw/src/bootstrap/spec/arm/arm_v6_cpu.cc | 4 ++-- repos/base-hw/src/bootstrap/spec/arm/arm_v7_cpu.cc | 4 ++-- repos/base-hw/src/bootstrap/spec/arm/cortex_a15_cpu.cc | 2 +- repos/base-hw/src/bootstrap/spec/arm/cortex_a8_mmu.cc | 4 ++-- repos/base-hw/src/bootstrap/spec/arm/cortex_a9_actlr.h | 2 +- repos/base-hw/src/bootstrap/spec/arm/cortex_a9_mmu.cc | 2 +- repos/base-hw/src/bootstrap/spec/arm/cpu.cc | 2 +- repos/base-hw/src/bootstrap/spec/arm/cpu.h | 4 ++-- repos/base-hw/src/bootstrap/spec/arm/imx6_platform.cc | 4 ++-- repos/base-hw/src/bootstrap/spec/arndale/platform.cc | 10 ++++++---- .../base-hw/src/bootstrap/spec/imx7d_sabre/platform.cc | 8 ++++---- repos/base-hw/src/bootstrap/spec/odroid_xu/platform.cc | 4 ++-- repos/base-hw/src/bootstrap/spec/panda/platform.cc | 6 +++--- repos/base-hw/src/bootstrap/spec/pbxa9/platform.cc | 4 ++-- repos/base-hw/src/bootstrap/spec/riscv/board.h | 2 -- repos/base-hw/src/bootstrap/spec/rpi/board.h | 2 +- repos/base-hw/src/bootstrap/spec/rpi/platform.cc | 2 ++ repos/base-hw/src/bootstrap/spec/rpi3/board.h | 5 +---- repos/base-hw/src/bootstrap/spec/rpi3/platform.cc | 2 +- repos/base-hw/src/bootstrap/spec/x86_64/board.h | 5 +---- repos/base-hw/src/bootstrap/spec/x86_64/platform.cc | 2 ++ .../base-hw/src/bootstrap/spec/x86_64/platform_muen.cc | 2 ++ repos/base-hw/src/bootstrap/spec/zynq/platform.cc | 6 +++--- 25 files changed, 46 insertions(+), 45 deletions(-) diff --git a/repos/base-hw/lib/mk/spec/x86_64/bootstrap-hw-muen.mk b/repos/base-hw/lib/mk/spec/x86_64/bootstrap-hw-muen.mk index 4588a480f..db41f8dc0 100644 --- a/repos/base-hw/lib/mk/spec/x86_64/bootstrap-hw-muen.mk +++ b/repos/base-hw/lib/mk/spec/x86_64/bootstrap-hw-muen.mk @@ -1,3 +1,5 @@ +REQUIRES = muen + INC_DIR += $(BASE_DIR)/../base-hw/src/bootstrap/spec/x86_64 SRC_CC += bootstrap/spec/x86_64/platform_muen.cc diff --git a/repos/base-hw/src/bootstrap/platform.h b/repos/base-hw/src/bootstrap/platform.h index 88c662ae3..ea7bee31a 100644 --- a/repos/base-hw/src/bootstrap/platform.h +++ b/repos/base-hw/src/bootstrap/platform.h @@ -123,7 +123,6 @@ class Bootstrap::Platform }; Board board { }; - Bootstrap::Cpu cpu { }; Ram_allocator ram_alloc { }; Memory_region const bootstrap_region; Genode::Constructible core_pd { }; diff --git a/repos/base-hw/src/bootstrap/spec/arm/arm_v6_cpu.cc b/repos/base-hw/src/bootstrap/spec/arm/arm_v6_cpu.cc index 1d0c94d53..4f78ff831 100644 --- a/repos/base-hw/src/bootstrap/spec/arm/arm_v6_cpu.cc +++ b/repos/base-hw/src/bootstrap/spec/arm/arm_v6_cpu.cc @@ -15,9 +15,9 @@ #include -void Bootstrap::Cpu::invalidate_data_cache() { +void Board::Cpu::invalidate_data_cache() { asm volatile ("mcr p15, 0, %[rd], c7, c6, 0" :: [rd]"r"(0) : ); } -void Bootstrap::Cpu::clean_invalidate_data_cache() { +void Board::Cpu::clean_invalidate_data_cache() { asm volatile ("mcr p15, 0, %[rd], c7, c14, 0" :: [rd]"r"(0) : ); } diff --git a/repos/base-hw/src/bootstrap/spec/arm/arm_v7_cpu.cc b/repos/base-hw/src/bootstrap/spec/arm/arm_v7_cpu.cc index 1f683e28b..8485e643e 100644 --- a/repos/base-hw/src/bootstrap/spec/arm/arm_v7_cpu.cc +++ b/repos/base-hw/src/bootstrap/spec/arm/arm_v7_cpu.cc @@ -128,7 +128,7 @@ ::: "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9" -void Bootstrap::Cpu::invalidate_data_cache() +void Board::Cpu::invalidate_data_cache() { /** * Data Cache Invalidate by Set/Way for all Set/Way @@ -139,7 +139,7 @@ void Bootstrap::Cpu::invalidate_data_cache() } -void Bootstrap::Cpu::clean_invalidate_data_cache() +void Board::Cpu::clean_invalidate_data_cache() { /** * Data Cache Clean by Set/Way for all Set/Way diff --git a/repos/base-hw/src/bootstrap/spec/arm/cortex_a15_cpu.cc b/repos/base-hw/src/bootstrap/spec/arm/cortex_a15_cpu.cc index d3c304efb..756a505eb 100644 --- a/repos/base-hw/src/bootstrap/spec/arm/cortex_a15_cpu.cc +++ b/repos/base-hw/src/bootstrap/spec/arm/cortex_a15_cpu.cc @@ -14,7 +14,7 @@ #include -void Bootstrap::Cpu::enable_mmu_and_caches(Genode::addr_t table) +void Board::Cpu::enable_mmu_and_caches(Genode::addr_t table) { /* invalidate TLB */ Tlbiall::write(0); diff --git a/repos/base-hw/src/bootstrap/spec/arm/cortex_a8_mmu.cc b/repos/base-hw/src/bootstrap/spec/arm/cortex_a8_mmu.cc index d01a93677..e7fdddd97 100644 --- a/repos/base-hw/src/bootstrap/spec/arm/cortex_a8_mmu.cc +++ b/repos/base-hw/src/bootstrap/spec/arm/cortex_a8_mmu.cc @@ -15,8 +15,8 @@ unsigned Bootstrap::Platform::enable_mmu() { - Cpu::Sctlr::init(); - Cpu::enable_mmu_and_caches((addr_t)core_pd->table_base); + ::Board::Cpu::Sctlr::init(); + ::Board::Cpu::enable_mmu_and_caches((addr_t)core_pd->table_base); return 0; } diff --git a/repos/base-hw/src/bootstrap/spec/arm/cortex_a9_actlr.h b/repos/base-hw/src/bootstrap/spec/arm/cortex_a9_actlr.h index b2d49f1f8..c1d98353d 100644 --- a/repos/base-hw/src/bootstrap/spec/arm/cortex_a9_actlr.h +++ b/repos/base-hw/src/bootstrap/spec/arm/cortex_a9_actlr.h @@ -18,7 +18,7 @@ namespace Bootstrap { struct Actlr; } -struct Bootstrap::Actlr : Bootstrap::Cpu::Actlr +struct Bootstrap::Actlr : Board::Cpu::Actlr { struct Fw : Bitfield<0, 1> { }; struct L2_prefetch_enable : Bitfield<1, 1> { }; diff --git a/repos/base-hw/src/bootstrap/spec/arm/cortex_a9_mmu.cc b/repos/base-hw/src/bootstrap/spec/arm/cortex_a9_mmu.cc index e2ab1026b..e7800f99f 100644 --- a/repos/base-hw/src/bootstrap/spec/arm/cortex_a9_mmu.cc +++ b/repos/base-hw/src/bootstrap/spec/arm/cortex_a9_mmu.cc @@ -103,7 +103,7 @@ struct Scu : Genode::Mmio */ unsigned Bootstrap::Platform::enable_mmu() { - using namespace Bootstrap; + using namespace Board; static volatile bool primary_cpu = true; static Cpu_counter data_cache_invalidated; diff --git a/repos/base-hw/src/bootstrap/spec/arm/cpu.cc b/repos/base-hw/src/bootstrap/spec/arm/cpu.cc index fba579ad5..6ceba7197 100644 --- a/repos/base-hw/src/bootstrap/spec/arm/cpu.cc +++ b/repos/base-hw/src/bootstrap/spec/arm/cpu.cc @@ -13,7 +13,7 @@ #include -void Bootstrap::Cpu::enable_mmu_and_caches(Genode::addr_t table) +void Board::Cpu::enable_mmu_and_caches(Genode::addr_t table) { /* invalidate TLB */ Tlbiall::write(0); diff --git a/repos/base-hw/src/bootstrap/spec/arm/cpu.h b/repos/base-hw/src/bootstrap/spec/arm/cpu.h index 72195f883..25aeb6bc2 100644 --- a/repos/base-hw/src/bootstrap/spec/arm/cpu.h +++ b/repos/base-hw/src/bootstrap/spec/arm/cpu.h @@ -16,9 +16,9 @@ #include -namespace Bootstrap { struct Cpu; } +namespace Board { struct Cpu; } -struct Bootstrap::Cpu : Hw::Arm_cpu +struct Board::Cpu : Hw::Arm_cpu { struct Sctlr : Hw::Arm_cpu::Sctlr { diff --git a/repos/base-hw/src/bootstrap/spec/arm/imx6_platform.cc b/repos/base-hw/src/bootstrap/spec/arm/imx6_platform.cc index 5a51c8ee1..91dd8cf20 100644 --- a/repos/base-hw/src/bootstrap/spec/arm/imx6_platform.cc +++ b/repos/base-hw/src/bootstrap/spec/arm/imx6_platform.cc @@ -36,11 +36,11 @@ Bootstrap::Platform::Board::Board() } -bool Bootstrap::Cpu::errata(Bootstrap::Cpu::Errata err) { +bool Board::Cpu::errata(Board::Cpu::Errata err) { return (err == ARM_764369) ? true : false; } -void Bootstrap::Cpu::wake_up_all_cpus(void * const entry) +void Board::Cpu::wake_up_all_cpus(void * const entry) { struct Src : Genode::Mmio { diff --git a/repos/base-hw/src/bootstrap/spec/arndale/platform.cc b/repos/base-hw/src/bootstrap/spec/arndale/platform.cc index 7a86d1f8e..adbd9d877 100644 --- a/repos/base-hw/src/bootstrap/spec/arndale/platform.cc +++ b/repos/base-hw/src/bootstrap/spec/arndale/platform.cc @@ -152,6 +152,8 @@ static inline void switch_to_supervisor_mode() unsigned Bootstrap::Platform::enable_mmu() { + using namespace ::Board; + static volatile bool primary_cpu = true; board.pic.init_cpu_local(); @@ -162,21 +164,21 @@ unsigned Bootstrap::Platform::enable_mmu() Cpu::Sctlr::init(); Cpu::Cpsr::init(); - cpu.invalidate_data_cache(); + Cpu::invalidate_data_cache(); /* primary cpu wakes up all others */ if (primary_cpu && NR_OF_CPUS > 1) { primary_cpu = false; - cpu.wake_up_all_cpus(&_start_setup_stack); + Cpu::wake_up_all_cpus(&_start_setup_stack); } - cpu.enable_mmu_and_caches((Genode::addr_t)core_pd->table_base); + Cpu::enable_mmu_and_caches((Genode::addr_t)core_pd->table_base); return Cpu::Mpidr::Aff_0::get(Cpu::Mpidr::read()); } -void Bootstrap::Cpu::wake_up_all_cpus(void * const ip) +void Board::Cpu::wake_up_all_cpus(void * const ip) { *(void * volatile *)Board::IRAM_BASE = ip; asm volatile("dsb; sev;"); diff --git a/repos/base-hw/src/bootstrap/spec/imx7d_sabre/platform.cc b/repos/base-hw/src/bootstrap/spec/imx7d_sabre/platform.cc index bf84f0cf5..23cc11e3e 100644 --- a/repos/base-hw/src/bootstrap/spec/imx7d_sabre/platform.cc +++ b/repos/base-hw/src/bootstrap/spec/imx7d_sabre/platform.cc @@ -298,18 +298,18 @@ unsigned Bootstrap::Platform::enable_mmu() /* primary cpu wakes up all others */ if (primary_cpu && NR_OF_CPUS > 1) { - cpu.invalidate_data_cache(); + Cpu::invalidate_data_cache(); primary_cpu = false; - cpu.wake_up_all_cpus(&_start_setup_stack); + Cpu::wake_up_all_cpus(&_start_setup_stack); } - cpu.enable_mmu_and_caches((Genode::addr_t)core_pd->table_base); + Cpu::enable_mmu_and_caches((Genode::addr_t)core_pd->table_base); return Cpu::Mpidr::Aff_0::get(Cpu::Mpidr::read()); } -void Bootstrap::Cpu::wake_up_all_cpus(void * const ip) +void Board::Cpu::wake_up_all_cpus(void * const ip) { struct Src : Genode::Mmio { diff --git a/repos/base-hw/src/bootstrap/spec/odroid_xu/platform.cc b/repos/base-hw/src/bootstrap/spec/odroid_xu/platform.cc index c90a7597f..a56ae8eff 100644 --- a/repos/base-hw/src/bootstrap/spec/odroid_xu/platform.cc +++ b/repos/base-hw/src/bootstrap/spec/odroid_xu/platform.cc @@ -28,7 +28,7 @@ unsigned Bootstrap::Platform::enable_mmu() board.pic.init_cpu_local(); Cpu::Sctlr::init(); Cpu::Cpsr::init(); - cpu.invalidate_data_cache(); - cpu.enable_mmu_and_caches((Genode::addr_t)core_pd->table_base); + Cpu::invalidate_data_cache(); + Cpu::enable_mmu_and_caches((Genode::addr_t)core_pd->table_base); return 0; } diff --git a/repos/base-hw/src/bootstrap/spec/panda/platform.cc b/repos/base-hw/src/bootstrap/spec/panda/platform.cc index d307acfc4..188847b9a 100644 --- a/repos/base-hw/src/bootstrap/spec/panda/platform.cc +++ b/repos/base-hw/src/bootstrap/spec/panda/platform.cc @@ -25,10 +25,10 @@ Bootstrap::Platform::Board::Board() PL310_MMIO_SIZE }) { } -bool Bootstrap::Cpu::errata(Bootstrap::Cpu::Errata) { return false; } +bool Board::Cpu::errata(Board::Cpu::Errata) { return false; } -void Bootstrap::Cpu::wake_up_all_cpus(void * const ip) +void Board::Cpu::wake_up_all_cpus(void * const ip) { struct Wakeup_generator : Genode::Mmio { @@ -39,7 +39,7 @@ void Bootstrap::Cpu::wake_up_all_cpus(void * const ip) Wakeup_generator(void * const ip) : Mmio(CORTEX_A9_WUGEN_MMIO_BASE) { - write((addr_t)ip); + write((Genode::addr_t)ip); write(1); } }; diff --git a/repos/base-hw/src/bootstrap/spec/pbxa9/platform.cc b/repos/base-hw/src/bootstrap/spec/pbxa9/platform.cc index 0be44b8cf..91e47d614 100644 --- a/repos/base-hw/src/bootstrap/spec/pbxa9/platform.cc +++ b/repos/base-hw/src/bootstrap/spec/pbxa9/platform.cc @@ -27,10 +27,10 @@ Bootstrap::Platform::Board::Board() PL310_MMIO_SIZE }) { } -bool Bootstrap::Cpu::errata(Bootstrap::Cpu::Errata) { return false; } +bool Board::Cpu::errata(Board::Cpu::Errata) { return false; } -void Bootstrap::Cpu::wake_up_all_cpus(void * const ip) +void Board::Cpu::wake_up_all_cpus(void * const ip) { /** * set the entrypoint for the other CPUs via the flags register diff --git a/repos/base-hw/src/bootstrap/spec/riscv/board.h b/repos/base-hw/src/bootstrap/spec/riscv/board.h index 2b6997544..433f317c7 100644 --- a/repos/base-hw/src/bootstrap/spec/riscv/board.h +++ b/repos/base-hw/src/bootstrap/spec/riscv/board.h @@ -21,8 +21,6 @@ namespace Board { struct Pic {}; } -namespace Bootstrap { struct Cpu {}; } - template void Sv39::Level_x_translation_table::_translation_added(addr_t, size_t) { } diff --git a/repos/base-hw/src/bootstrap/spec/rpi/board.h b/repos/base-hw/src/bootstrap/spec/rpi/board.h index f0ab46dc2..dc26e071c 100644 --- a/repos/base-hw/src/bootstrap/spec/rpi/board.h +++ b/repos/base-hw/src/bootstrap/spec/rpi/board.h @@ -33,6 +33,6 @@ constexpr bool Hw::Page_table::Descriptor_base::_smp() { return false; } void Hw::Page_table::_translation_added(unsigned long, unsigned long) { - Bootstrap::Cpu::clean_invalidate_data_cache(); } + Board::Cpu::clean_invalidate_data_cache(); } #endif /* _SRC__BOOTSTRAP__SPEC__RPI__BOARD_H_ */ diff --git a/repos/base-hw/src/bootstrap/spec/rpi/platform.cc b/repos/base-hw/src/bootstrap/spec/rpi/platform.cc index 50b97cd79..0c3a5be9d 100644 --- a/repos/base-hw/src/bootstrap/spec/rpi/platform.cc +++ b/repos/base-hw/src/bootstrap/spec/rpi/platform.cc @@ -37,6 +37,8 @@ Bootstrap::Platform::Board::Board() unsigned Bootstrap::Platform::enable_mmu() { + using ::Board::Cpu; + struct Sctlr : Cpu::Sctlr { struct W : Bitfield<3,1> { }; /* enable write buffer */ diff --git a/repos/base-hw/src/bootstrap/spec/rpi3/board.h b/repos/base-hw/src/bootstrap/spec/rpi3/board.h index 15245263d..2018178c7 100644 --- a/repos/base-hw/src/bootstrap/spec/rpi3/board.h +++ b/repos/base-hw/src/bootstrap/spec/rpi3/board.h @@ -18,12 +18,9 @@ #include #include -namespace Bootstrap { - using Cpu = Hw::Arm_64_cpu; -}; - namespace Board { using namespace Hw::Rpi3_board; + using Cpu = Hw::Arm_64_cpu; struct Pic {}; }; diff --git a/repos/base-hw/src/bootstrap/spec/rpi3/platform.cc b/repos/base-hw/src/bootstrap/spec/rpi3/platform.cc index a015a355b..3dd063e0f 100644 --- a/repos/base-hw/src/bootstrap/spec/rpi3/platform.cc +++ b/repos/base-hw/src/bootstrap/spec/rpi3/platform.cc @@ -13,7 +13,7 @@ #include -using Bootstrap::Cpu; +using Board::Cpu; /** diff --git a/repos/base-hw/src/bootstrap/spec/x86_64/board.h b/repos/base-hw/src/bootstrap/spec/x86_64/board.h index aad53f3af..67af752cd 100644 --- a/repos/base-hw/src/bootstrap/spec/x86_64/board.h +++ b/repos/base-hw/src/bootstrap/spec/x86_64/board.h @@ -19,12 +19,9 @@ #include #include -namespace Bootstrap { - using Cpu = Hw::X86_64_cpu; -} - namespace Board { using namespace Hw::Pc_board; + using Cpu = Hw::X86_64_cpu; struct Pic {}; } diff --git a/repos/base-hw/src/bootstrap/spec/x86_64/platform.cc b/repos/base-hw/src/bootstrap/spec/x86_64/platform.cc index 62716c781..35316db82 100644 --- a/repos/base-hw/src/bootstrap/spec/x86_64/platform.cc +++ b/repos/base-hw/src/bootstrap/spec/x86_64/platform.cc @@ -277,6 +277,8 @@ static inline void ipi_to_all(Lapic &lapic, unsigned const boot_frame, unsigned Bootstrap::Platform::enable_mmu() { + using ::Board::Cpu; + Cpu::Cr3::write(Cpu::Cr3::Pdb::masked((addr_t)core_pd->table_base)); addr_t const stack_base = reinterpret_cast(&__bootstrap_stack); diff --git a/repos/base-hw/src/bootstrap/spec/x86_64/platform_muen.cc b/repos/base-hw/src/bootstrap/spec/x86_64/platform_muen.cc index 4a2a3dbaf..a482cfabd 100644 --- a/repos/base-hw/src/bootstrap/spec/x86_64/platform_muen.cc +++ b/repos/base-hw/src/bootstrap/spec/x86_64/platform_muen.cc @@ -46,6 +46,8 @@ Bootstrap::Platform::Board::Board() unsigned Bootstrap::Platform::enable_mmu() { + using ::Board::Cpu; + Cpu::Cr3::write(Cpu::Cr3::Pdb::masked((addr_t)core_pd->table_base)); return 0; } diff --git a/repos/base-hw/src/bootstrap/spec/zynq/platform.cc b/repos/base-hw/src/bootstrap/spec/zynq/platform.cc index 689153099..a9fb7ed06 100644 --- a/repos/base-hw/src/bootstrap/spec/zynq/platform.cc +++ b/repos/base-hw/src/bootstrap/spec/zynq/platform.cc @@ -29,17 +29,17 @@ Bootstrap::Platform::Board::Board() PL310_MMIO_SIZE }) { } -bool Bootstrap::Cpu::errata(Bootstrap::Cpu::Errata) { +bool Cpu::errata(Board::Cpu::Errata) { return false; } -void Bootstrap::Cpu::wake_up_all_cpus(void* ip) { +void Cpu::wake_up_all_cpus(void* ip) { struct Wakeup_generator : Genode::Mmio { struct Core1_boot_addr : Register<0x0, 32> { }; Wakeup_generator(void * const ip) : Mmio(CORE1_ENTRY) { - write((addr_t)ip); + write((Genode::addr_t)ip); } };