From 00921e4a5c63570134bac42e510830465f4c26f1 Mon Sep 17 00:00:00 2001
From: Reto Buerki <reet@codelabs.ch>
Date: Fri, 27 Feb 2015 09:38:24 +0100
Subject: [PATCH] hw_x86_64: Create Tss instance in mtc region

Use the _mt_tss label and the placement new operator to create the
Tss class instance in the mtc region. Update the hard-coded
TSS base address to use the virtual mtc address.
---
 repos/base-hw/src/core/include/spec/x86/cpu.h        | 10 ++++++----
 repos/base-hw/src/core/spec/x86_64/mode_transition.s |  4 ++--
 2 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/repos/base-hw/src/core/include/spec/x86/cpu.h b/repos/base-hw/src/core/include/spec/x86/cpu.h
index 9a6931a2c..9e9d5ed80 100644
--- a/repos/base-hw/src/core/include/spec/x86/cpu.h
+++ b/repos/base-hw/src/core/include/spec/x86/cpu.h
@@ -22,6 +22,7 @@
 #include <tss.h>
 
 extern int _mt_idt;
+extern int _mt_tss;
 
 namespace Genode
 {
@@ -42,20 +43,21 @@ class Genode::Cpu
 {
 	private:
 		Idt *_idt;
-		Tss _tss;
+		Tss *_tss;
 
 	public:
 
 		Cpu()
 		{
-			/* Setup IDT only once */
 			if (primary_id() == executing_id()) {
 				_idt = new (&_mt_idt) Idt();
 				_idt->setup();
-				_tss.load();
+
+				_tss = new (&_mt_tss) Tss();
+				_tss->load();
 			}
 			_idt->load(Cpu::exception_entry);
-			_tss.setup();
+			_tss->setup();
 		}
 
 		static constexpr addr_t exception_entry = 0x0; /* XXX */
diff --git a/repos/base-hw/src/core/spec/x86_64/mode_transition.s b/repos/base-hw/src/core/spec/x86_64/mode_transition.s
index ce39aa107..d9c5b8196 100644
--- a/repos/base-hw/src/core/spec/x86_64/mode_transition.s
+++ b/repos/base-hw/src/core/spec/x86_64/mode_transition.s
@@ -291,9 +291,9 @@
 	/* GDTE_LONG | GDTE_PRESENT | GDTE_TYPE_DATA_A | GDTE_TYPE_DATA_W | GDTE_NON_SYSTEM */
 	.long 0x20f300
 	/* Task segment descriptor */
-	.long 0x35b10068
+	.long 0x1e000068
 	/* GDTE_PRESENT | GDTE_SYS_TSS */
-	.long 0x8929
+	.long 0x8900
 	.long 0
 	.long 0
 	_gdt_end: