2012-05-30 20:13:09 +02:00
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/*
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* \brief Platform implementations specific for base-hw and Panda A2
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* \author Martin Stein
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* \date 2012-04-27
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*/
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/*
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2013-01-10 21:44:47 +01:00
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* Copyright (C) 2012-2013 Genode Labs GmbH
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2012-05-30 20:13:09 +02:00
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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/* core includes */
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#include <platform.h>
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2012-12-10 13:55:19 +01:00
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#include <board.h>
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2013-01-25 16:56:39 +01:00
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#include <cpu.h>
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#include <pic.h>
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2012-05-30 20:13:09 +02:00
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using namespace Genode;
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Native_region * Platform::_ram_regions(unsigned const i)
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{
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static Native_region _regions[] =
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{
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2012-12-10 13:55:19 +01:00
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{ Board::RAM_0_BASE, Board::RAM_0_SIZE }
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2012-05-30 20:13:09 +02:00
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};
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return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
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}
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Native_region * Platform::_irq_regions(unsigned const i)
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{
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static Native_region _regions[] =
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{
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2013-01-25 16:56:39 +01:00
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{ 0, Kernel::Pic::MAX_INTERRUPT_ID + 1 }
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2012-05-30 20:13:09 +02:00
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};
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return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
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}
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Native_region * Platform::_core_only_irq_regions(unsigned const i)
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{
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static Native_region _regions[] =
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{
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/* core timer */
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2013-01-25 16:56:39 +01:00
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{ Genode::Cpu::PRIVATE_TIMER_IRQ, 1 },
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2012-05-30 20:13:09 +02:00
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/* core UART */
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2012-12-10 13:55:19 +01:00
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{ Board::TL16C750_3_IRQ, 1 }
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2012-05-30 20:13:09 +02:00
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};
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return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
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}
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Native_region * Platform::_mmio_regions(unsigned const i)
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{
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static Native_region _regions[] =
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{
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2012-12-10 13:55:19 +01:00
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{ Board::MMIO_0_BASE, Board::MMIO_0_SIZE },
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{ Board::MMIO_1_BASE, Board::MMIO_1_SIZE },
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{ Board::DSS_MMIO_BASE, Board::DSS_MMIO_SIZE },
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{ Board::DISPC_MMIO_BASE, Board::DISPC_MMIO_SIZE },
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{ Board::HDMI_MMIO_BASE, Board::HDMI_MMIO_SIZE }
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2012-05-30 20:13:09 +02:00
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};
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return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
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}
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Native_region * Platform::_core_only_mmio_regions(unsigned const i)
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{
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static Native_region _regions[] =
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{
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/* core timer and PIC */
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2012-12-10 13:55:19 +01:00
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{ Board::CORTEX_A9_PRIVATE_MEM_BASE,
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Board::CORTEX_A9_PRIVATE_MEM_SIZE },
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2012-05-30 20:13:09 +02:00
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/* core UART */
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2012-12-10 13:55:19 +01:00
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{ Board::TL16C750_3_MMIO_BASE, Board::TL16C750_MMIO_SIZE }
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2012-05-30 20:13:09 +02:00
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};
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return i < sizeof(_regions)/sizeof(_regions[0]) ? &_regions[i] : 0;
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}
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