2011-12-22 16:19:25 +01:00
|
|
|
/*
|
Fiasco.OC: introduce Cap_index (fixes #149, #112)
This commit introduces a Cap_index class for Fiasco.OC's capabilities.
A Cap_index is a combination of the global capability id, that is used by Genode
to correctly identify a kernel-object, and a corresponding entry in a
protection-domain's (kernel-)capability-space. The cap-indices are non-copyable,
unique objects, that are held in a Cap_map. The Cap_map is used to re-find
capabilities already present in the protection-domain, when a capability is
received via IPC. The retrieval of capabilities effectively fixes issue #112,
meaning the waste of capability-space entries.
Because Cap_index objects are non-copyable (their address indicates the position
in the capability-space of the pd), they are inappropriate to use as
Native_capability. Therefore, Native_capability is implemented as a reference
to Cap_index objects. This design seems to be a good pre-condition to implement
smart-pointers for entries in the capability-space, and thereby closing existing
leaks (please refer to issue #32).
Cap_index, Cap_map, and the allocator for Cap_index objects are designed in a way,
that it should be relatively easy to apply the same concept to NOVA also. By now,
these classes are located in the `base-foc` repository, but they intentionally
contain no Fiasco.OC specific elements.
The previously explained changes had extensive impact on the whole Fiasco.OC
platform implementation, due to various dependencies. The following things had to
be changed:
* The Thread object's startup and destruction routine is re-arranged, to
enable another thread (that calls the Thread destructor) gaining the
capability id of the thread's gate to remove it from the Cap_map, the
thread's UTCB had to be made available to the caller, because there
is the current location of that id. After having the UTCB available
in the Thread object for that reason, the whole thread bootstrapping
could be simplified.
* In the course of changing the Native_capability's semantic, a new Cap_mapping
class was introduced in core, that facilitates the establishment and
destruction of capability mappings between core and it's client's, especially
mappings related to Platform_thread and Platform_task, that are relevant to
task and thread creation and destruction. Thereby, the destruction of
threads had to be reworked, which effectively removed a bug (issue #149)
where some threads weren't destroyed properly.
* In the quick fix for issue #112, something similar to the Cap_map was
introduced available in all processes. Moreover, some kind of a capability
map already existed in core, to handle cap-session request properly. The
introduction of the Cap_map unified both structures, so that the
cap-session component code in core had to be reworked too.
* The platform initialization code had to be changed sligthly due to the
changes in Native_capability
* The vcpu initialization in the L4Linux support library had to be adapted
according to the already mentioned changes in the Thread object's bootstrap
code.
2012-03-15 12:41:24 +01:00
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|
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* \brief Fiasco.OC-specific core implementation of IRQ sessions
|
2011-12-22 16:19:25 +01:00
|
|
|
* \author Christian Helmuth
|
Fiasco.OC: introduce Cap_index (fixes #149, #112)
This commit introduces a Cap_index class for Fiasco.OC's capabilities.
A Cap_index is a combination of the global capability id, that is used by Genode
to correctly identify a kernel-object, and a corresponding entry in a
protection-domain's (kernel-)capability-space. The cap-indices are non-copyable,
unique objects, that are held in a Cap_map. The Cap_map is used to re-find
capabilities already present in the protection-domain, when a capability is
received via IPC. The retrieval of capabilities effectively fixes issue #112,
meaning the waste of capability-space entries.
Because Cap_index objects are non-copyable (their address indicates the position
in the capability-space of the pd), they are inappropriate to use as
Native_capability. Therefore, Native_capability is implemented as a reference
to Cap_index objects. This design seems to be a good pre-condition to implement
smart-pointers for entries in the capability-space, and thereby closing existing
leaks (please refer to issue #32).
Cap_index, Cap_map, and the allocator for Cap_index objects are designed in a way,
that it should be relatively easy to apply the same concept to NOVA also. By now,
these classes are located in the `base-foc` repository, but they intentionally
contain no Fiasco.OC specific elements.
The previously explained changes had extensive impact on the whole Fiasco.OC
platform implementation, due to various dependencies. The following things had to
be changed:
* The Thread object's startup and destruction routine is re-arranged, to
enable another thread (that calls the Thread destructor) gaining the
capability id of the thread's gate to remove it from the Cap_map, the
thread's UTCB had to be made available to the caller, because there
is the current location of that id. After having the UTCB available
in the Thread object for that reason, the whole thread bootstrapping
could be simplified.
* In the course of changing the Native_capability's semantic, a new Cap_mapping
class was introduced in core, that facilitates the establishment and
destruction of capability mappings between core and it's client's, especially
mappings related to Platform_thread and Platform_task, that are relevant to
task and thread creation and destruction. Thereby, the destruction of
threads had to be reworked, which effectively removed a bug (issue #149)
where some threads weren't destroyed properly.
* In the quick fix for issue #112, something similar to the Cap_map was
introduced available in all processes. Moreover, some kind of a capability
map already existed in core, to handle cap-session request properly. The
introduction of the Cap_map unified both structures, so that the
cap-session component code in core had to be reworked too.
* The platform initialization code had to be changed sligthly due to the
changes in Native_capability
* The vcpu initialization in the L4Linux support library had to be adapted
according to the already mentioned changes in the Thread object's bootstrap
code.
2012-03-15 12:41:24 +01:00
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* \author Stefan Kalkowski
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2012-10-05 14:46:16 +02:00
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* \author Sebastian Sumpf
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2011-12-22 16:19:25 +01:00
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* \date 2007-09-13
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*/
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/*
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2015-05-09 21:48:12 +02:00
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* Copyright (C) 2007-2015 Genode Labs GmbH
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2011-12-22 16:19:25 +01:00
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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/* Genode includes */
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#include <base/printf.h>
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#include <util/arg_string.h>
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2015-05-09 21:48:12 +02:00
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#include <util/bit_array.h>
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2011-12-22 16:19:25 +01:00
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/* core includes */
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#include <irq_root.h>
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#include <irq_session_component.h>
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2012-03-16 14:47:41 +01:00
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#include <platform.h>
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2011-12-22 16:19:25 +01:00
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#include <util.h>
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/* Fiasco includes */
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namespace Fiasco {
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#include <l4/sys/icu.h>
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#include <l4/sys/irq.h>
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#include <l4/sys/factory.h>
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#include <l4/sys/types.h>
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}
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2012-10-05 14:46:16 +02:00
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namespace Genode {
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class Interrupt_handler;
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}
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2011-12-22 16:19:25 +01:00
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2015-05-09 21:48:12 +02:00
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using namespace Genode;
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2012-10-05 14:46:16 +02:00
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/**
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* Dispatches interrupts from kernel
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*/
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2015-05-15 14:45:30 +02:00
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class Genode::Interrupt_handler : public Thread<2048*sizeof(long)>
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2011-12-22 16:19:25 +01:00
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{
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2012-10-05 14:46:16 +02:00
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private:
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2011-12-22 16:19:25 +01:00
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2013-10-10 17:00:03 +02:00
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Interrupt_handler() : Thread("irq_handler") { start(); }
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2011-12-22 16:19:25 +01:00
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2012-10-05 14:46:16 +02:00
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public:
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2011-12-22 16:19:25 +01:00
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2012-10-05 14:46:16 +02:00
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void entry();
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2011-12-22 16:19:25 +01:00
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2016-01-23 14:42:55 +01:00
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static Fiasco::l4_cap_idx_t handler_cap()
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2012-10-05 14:46:16 +02:00
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{
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static Interrupt_handler handler;
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return handler._thread_cap.dst();
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}
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2015-05-09 21:48:12 +02:00
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2012-10-05 14:46:16 +02:00
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};
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2011-12-22 16:19:25 +01:00
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2015-05-09 21:48:12 +02:00
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enum { MAX_MSIS = 256 };
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static class Msi_allocator : public Genode::Bit_array<MAX_MSIS>
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2011-12-22 16:19:25 +01:00
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{
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2015-05-09 21:48:12 +02:00
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public:
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2015-04-27 12:17:20 +02:00
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2015-05-09 21:48:12 +02:00
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Msi_allocator() {
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using namespace Fiasco;
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2011-12-22 16:19:25 +01:00
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2015-05-09 21:48:12 +02:00
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l4_icu_info_t info { .features = 0 };
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l4_msgtag_t res = l4_icu_info(Fiasco::L4_BASE_ICU_CAP, &info);
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2011-12-22 16:19:25 +01:00
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2015-05-09 21:48:12 +02:00
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if (l4_error(res) || !(info.features & L4_ICU_FLAG_MSI))
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set(0, MAX_MSIS);
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else
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if (info.nr_msis < MAX_MSIS)
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set(info.nr_msis, MAX_MSIS - info.nr_msis);
|
2011-12-22 16:19:25 +01:00
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}
|
2015-05-09 21:48:12 +02:00
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} msi_alloc;
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2011-12-22 16:19:25 +01:00
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2015-05-09 21:48:12 +02:00
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bool Genode::Irq_object::associate(unsigned irq, bool msi,
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Irq_session::Trigger trigger,
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Irq_session::Polarity polarity)
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{
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if (msi)
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/*
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* Local APIC address, See Intel x86 Spec - Section MSI 10.11.
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*
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* XXX local Apic ID encoding missing - address is constructed
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* assuming that local APIC id of boot CPU is 0 XXX
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*/
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_msi_addr = 0xfee00000UL;
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2011-12-22 16:19:25 +01:00
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|
2015-05-09 21:48:12 +02:00
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_irq = irq;
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_trigger = trigger;
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_polarity = polarity;
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2012-10-05 14:46:16 +02:00
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2015-05-09 21:48:12 +02:00
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|
using namespace Fiasco;
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if (l4_error(l4_factory_create_irq(L4_BASE_FACTORY_CAP,
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|
_capability()))) {
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PERR("l4_factory_create_irq failed!");
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return false;
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|
}
|
2012-10-05 14:46:16 +02:00
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2015-05-09 21:48:12 +02:00
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unsigned long gsi = _irq;
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if (_msi_addr)
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gsi |= L4_ICU_FLAG_MSI;
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2012-10-05 14:46:16 +02:00
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|
2015-05-09 21:48:12 +02:00
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if (l4_error(l4_icu_bind(L4_BASE_ICU_CAP, gsi, _capability()))) {
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PERR("Binding IRQ %u to the ICU failed", _irq);
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return false;
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|
}
|
2012-10-05 14:46:16 +02:00
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|
2015-05-09 21:48:12 +02:00
|
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|
if (!_msi_addr)
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|
/* set interrupt mode */
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|
Platform::setup_irq_mode(gsi, _trigger, _polarity);
|
2012-10-05 14:46:16 +02:00
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|
2015-05-09 21:48:12 +02:00
|
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|
if (l4_error(l4_irq_attach(_capability(), reinterpret_cast<l4_umword_t>(this),
|
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|
|
Interrupt_handler::handler_cap()))) {
|
|
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|
PERR("Error attaching to IRQ %u", _irq);
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|
return false;
|
|
|
|
}
|
2012-10-05 14:46:16 +02:00
|
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|
2015-05-09 21:48:12 +02:00
|
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|
if (_msi_addr && l4_error(l4_icu_msi_info(L4_BASE_ICU_CAP, gsi,
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|
|
|
&_msi_data))) {
|
|
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|
PERR("Error getting MSI info");
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|
return false;
|
|
|
|
}
|
2012-10-05 14:46:16 +02:00
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|
2015-05-09 21:48:12 +02:00
|
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|
return true;
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|
|
|
}
|
2012-10-05 14:46:16 +02:00
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|
2015-04-27 12:17:20 +02:00
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2015-05-09 21:48:12 +02:00
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|
void Genode::Irq_object::ack_irq()
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|
{
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|
using namespace Fiasco;
|
2015-04-27 12:17:20 +02:00
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|
2015-05-09 21:48:12 +02:00
|
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|
int err;
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|
|
l4_msgtag_t tag = l4_irq_unmask(_capability());
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|
if ((err = l4_ipc_error(tag, l4_utcb())))
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|
PERR("IRQ unmask: %d\n", err);
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|
}
|
2012-10-05 14:46:16 +02:00
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2015-05-09 21:48:12 +02:00
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Genode::Irq_object::Irq_object()
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|
:
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_cap(cap_map()->insert(platform_specific()->cap_id_alloc()->alloc())),
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_trigger(Irq_session::TRIGGER_UNCHANGED),
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_polarity(Irq_session::POLARITY_UNCHANGED),
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_irq(~0U), _msi_addr(0), _msi_data(0)
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{ }
|
2011-12-22 16:19:25 +01:00
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|
2015-05-09 21:48:12 +02:00
|
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|
Genode::Irq_object::~Irq_object()
|
2011-12-22 16:19:25 +01:00
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|
{
|
2015-05-09 21:48:12 +02:00
|
|
|
if (_irq == ~0U)
|
2015-03-17 15:41:47 +01:00
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|
return;
|
2011-12-22 16:19:25 +01:00
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|
2015-05-09 21:48:12 +02:00
|
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|
using namespace Fiasco;
|
|
|
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unsigned long gsi = _irq;
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if (_msi_addr)
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gsi |= L4_ICU_FLAG_MSI;
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if (l4_error(l4_irq_detach(_capability())))
|
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|
PERR("Error detaching IRQ");
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|
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|
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|
if (l4_error(l4_icu_unbind(L4_BASE_ICU_CAP, gsi, _capability())))
|
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|
PERR("Error unbinding IRQ");
|
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|
cap_map()->remove(_cap);
|
2015-03-17 15:41:47 +01:00
|
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}
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2015-05-09 21:48:12 +02:00
|
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/***************************
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|
** IRQ session component **
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|
***************************/
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|
2015-03-17 15:41:47 +01:00
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Irq_session_component::Irq_session_component(Range_allocator *irq_alloc,
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const char *args)
|
2015-05-09 21:48:12 +02:00
|
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|
:
|
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|
|
_irq_number(~0U), _irq_alloc(irq_alloc)
|
2015-03-17 15:41:47 +01:00
|
|
|
{
|
2011-12-22 16:19:25 +01:00
|
|
|
long irq_number = Arg_string::find_arg(args, "irq_number").long_value(-1);
|
2015-05-09 21:48:12 +02:00
|
|
|
long msi = Arg_string::find_arg(args, "device_config_phys").long_value(0);
|
|
|
|
if (msi) {
|
|
|
|
if (msi_alloc.get(irq_number, 1)) {
|
|
|
|
PERR("Unavailable MSI %ld requested.", irq_number);
|
|
|
|
throw Root::Unavailable();
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|
|
}
|
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|
|
msi_alloc.set(irq_number, 1);
|
|
|
|
} else {
|
|
|
|
if (!irq_alloc || irq_alloc->alloc_addr(1, irq_number).is_error()) {
|
|
|
|
PERR("Unavailable IRQ %ld requested.", irq_number);
|
|
|
|
throw Root::Unavailable();
|
|
|
|
}
|
2011-12-22 16:19:25 +01:00
|
|
|
}
|
2013-06-26 14:25:45 +02:00
|
|
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|
2015-05-09 21:48:12 +02:00
|
|
|
_irq_number = irq_number;
|
|
|
|
|
2015-03-17 15:41:47 +01:00
|
|
|
long irq_t = Arg_string::find_arg(args, "irq_trigger").long_value(-1);
|
|
|
|
long irq_p = Arg_string::find_arg(args, "irq_polarity").long_value(-1);
|
|
|
|
|
|
|
|
Irq_session::Trigger irq_trigger;
|
|
|
|
Irq_session::Polarity irq_polarity;
|
|
|
|
|
|
|
|
switch(irq_t) {
|
|
|
|
case -1:
|
|
|
|
case Irq_session::TRIGGER_UNCHANGED:
|
|
|
|
irq_trigger = Irq_session::TRIGGER_UNCHANGED;
|
|
|
|
break;
|
|
|
|
case Irq_session::TRIGGER_EDGE:
|
|
|
|
irq_trigger = Irq_session::TRIGGER_EDGE;
|
|
|
|
break;
|
|
|
|
case Irq_session::TRIGGER_LEVEL:
|
|
|
|
irq_trigger = Irq_session::TRIGGER_LEVEL;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
throw Root::Unavailable();
|
|
|
|
}
|
2012-10-05 14:46:16 +02:00
|
|
|
|
2015-03-17 15:41:47 +01:00
|
|
|
switch(irq_p) {
|
|
|
|
case -1:
|
|
|
|
case POLARITY_UNCHANGED:
|
|
|
|
irq_polarity = POLARITY_UNCHANGED;
|
|
|
|
break;
|
|
|
|
case POLARITY_HIGH:
|
|
|
|
irq_polarity = POLARITY_HIGH;
|
|
|
|
break;
|
|
|
|
case POLARITY_LOW:
|
|
|
|
irq_polarity = POLARITY_LOW;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
throw Root::Unavailable();
|
|
|
|
}
|
2011-12-22 16:19:25 +01:00
|
|
|
|
2015-05-09 21:48:12 +02:00
|
|
|
_irq_object.associate(_irq_number, msi, irq_trigger, irq_polarity);
|
2011-12-22 16:19:25 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2015-03-17 15:41:47 +01:00
|
|
|
Irq_session_component::~Irq_session_component()
|
2011-12-22 16:19:25 +01:00
|
|
|
{
|
2015-05-09 21:48:12 +02:00
|
|
|
if (_irq_number == ~0U)
|
2015-03-17 15:41:47 +01:00
|
|
|
return;
|
2015-05-09 21:48:12 +02:00
|
|
|
|
|
|
|
if (_irq_object.msi_address()) {
|
|
|
|
msi_alloc.clear(_irq_number, 1);
|
|
|
|
} else {
|
|
|
|
Genode::addr_t free_irq = _irq_number;
|
|
|
|
_irq_alloc->free((void *)free_irq);
|
2015-03-17 15:41:47 +01:00
|
|
|
}
|
2015-05-09 21:48:12 +02:00
|
|
|
}
|
2015-03-17 15:41:47 +01:00
|
|
|
|
2012-10-05 14:46:16 +02:00
|
|
|
|
2015-05-09 21:48:12 +02:00
|
|
|
void Irq_session_component::ack_irq() { _irq_object.ack_irq(); }
|
2012-10-05 14:46:16 +02:00
|
|
|
|
2015-03-17 15:41:47 +01:00
|
|
|
|
2015-05-09 21:48:12 +02:00
|
|
|
void Irq_session_component::sigh(Genode::Signal_context_capability cap)
|
|
|
|
{
|
|
|
|
_irq_object.sigh(cap);
|
2015-03-17 13:28:20 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2015-04-27 12:17:20 +02:00
|
|
|
Genode::Irq_session::Info Irq_session_component::info()
|
|
|
|
{
|
2015-05-09 21:48:12 +02:00
|
|
|
if (!_irq_object.msi_address() || !_irq_object.msi_value())
|
2015-04-27 12:17:20 +02:00
|
|
|
return { .type = Genode::Irq_session::Info::Type::INVALID };
|
|
|
|
|
|
|
|
return {
|
|
|
|
.type = Genode::Irq_session::Info::Type::MSI,
|
2015-05-09 21:48:12 +02:00
|
|
|
.address = _irq_object.msi_address(),
|
|
|
|
.value = _irq_object.msi_value()
|
2015-04-27 12:17:20 +02:00
|
|
|
};
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2015-05-09 21:48:12 +02:00
|
|
|
/**************************************
|
|
|
|
** Interrupt handler implementation **
|
|
|
|
**************************************/
|
2012-10-05 14:46:16 +02:00
|
|
|
|
2014-03-03 19:45:53 +01:00
|
|
|
/* Build with frame pointer to make GDB backtraces work. See issue #1061. */
|
|
|
|
__attribute__((optimize("-fno-omit-frame-pointer")))
|
|
|
|
__attribute__((noinline))
|
2012-10-05 14:46:16 +02:00
|
|
|
void Interrupt_handler::entry()
|
|
|
|
{
|
|
|
|
using namespace Fiasco;
|
|
|
|
|
|
|
|
int err;
|
|
|
|
l4_msgtag_t tag;
|
|
|
|
l4_umword_t label;
|
|
|
|
|
|
|
|
while (true) {
|
|
|
|
tag = l4_ipc_wait(l4_utcb(), &label, L4_IPC_NEVER);
|
|
|
|
if ((err = l4_ipc_error(tag, l4_utcb())))
|
|
|
|
PERR("IRQ receive: %d\n", err);
|
|
|
|
else {
|
2015-05-09 21:48:12 +02:00
|
|
|
Irq_object * irq_object = reinterpret_cast<Irq_object *>(label);
|
|
|
|
irq_object->notify();
|
2012-10-05 14:46:16 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|