2011-12-22 16:19:25 +01:00
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/*
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* \brief Interface for accessing PCI configuration registers
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* \author Norman Feske
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2017-10-19 10:13:35 +02:00
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* \author Reto Buerki
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2011-12-22 16:19:25 +01:00
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* \date 2008-01-29
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*/
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/*
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2017-02-20 13:23:52 +01:00
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* Copyright (C) 2008-2017 Genode Labs GmbH
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2011-12-22 16:19:25 +01:00
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*
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* This file is part of the Genode OS framework, which is distributed
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2017-02-20 13:23:52 +01:00
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* under the terms of the GNU Affero General Public License version 3.
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2011-12-22 16:19:25 +01:00
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*/
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2016-03-11 17:32:43 +01:00
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#ifndef _X86_PCI_CONFIG_ACCESS_H_
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#define _X86_PCI_CONFIG_ACCESS_H_
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2011-12-22 16:19:25 +01:00
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2016-03-11 17:32:43 +01:00
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#include <util/bit_array.h>
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2017-10-19 10:13:35 +02:00
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#include <base/attached_io_mem_dataspace.h>
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#include <base/attached_rom_dataspace.h>
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2015-06-08 09:05:32 +02:00
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#include <platform_device/platform_device.h>
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2011-12-22 16:19:25 +01:00
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2017-10-19 10:13:35 +02:00
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using namespace Genode;
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2015-06-08 09:05:32 +02:00
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namespace Platform {
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2011-12-22 16:19:25 +01:00
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class Config_access
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{
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private:
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2017-10-19 10:13:35 +02:00
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Attached_io_mem_dataspace &_pciconf;
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Genode::size_t const _pciconf_size;
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2011-12-22 16:19:25 +01:00
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/**
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2017-10-19 10:13:35 +02:00
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* Calculate device offset from BDF
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2011-12-22 16:19:25 +01:00
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*
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* \param bus target PCI bus ID (0..255)
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* \param device target device ID (0..31)
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* \param function target function ID (0..7)
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*
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2017-10-19 10:13:35 +02:00
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* \return device base address
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2011-12-22 16:19:25 +01:00
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*/
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2017-10-19 10:13:35 +02:00
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unsigned _dev_base(int bus, int device, int function)
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{
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return ((bus << 20) |
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(device << 15) |
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(function << 12));
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}
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2011-12-22 16:19:25 +01:00
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Follow practices suggested by "Effective C++"
The patch adjust the code of the base, base-<kernel>, and os repository.
To adapt existing components to fix violations of the best practices
suggested by "Effective C++" as reported by the -Weffc++ compiler
argument. The changes follow the patterns outlined below:
* A class with virtual functions can no longer publicly inherit base
classed without a vtable. The inherited object may either be moved
to a member variable, or inherited privately. The latter would be
used for classes that inherit 'List::Element' or 'Avl_node'. In order
to enable the 'List' and 'Avl_tree' to access the meta data, the
'List' must become a friend.
* Instead of adding a virtual destructor to abstract base classes,
we inherit the new 'Interface' class, which contains a virtual
destructor. This way, single-line abstract base classes can stay
as compact as they are now. The 'Interface' utility resides in
base/include/util/interface.h.
* With the new warnings enabled, all member variables must be explicitly
initialized. Basic types may be initialized with '='. All other types
are initialized with braces '{ ... }' or as class initializers. If
basic types and non-basic types appear in a row, it is nice to only
use the brace syntax (also for basic types) and align the braces.
* If a class contains pointers as members, it must now also provide a
copy constructor and assignment operator. In the most cases, one
would make them private, effectively disallowing the objects to be
copied. Unfortunately, this warning cannot be fixed be inheriting
our existing 'Noncopyable' class (the compiler fails to detect that
the inheriting class cannot be copied and still gives the error).
For now, we have to manually add declarations for both the copy
constructor and assignment operator as private class members. Those
declarations should be prepended with a comment like this:
/*
* Noncopyable
*/
Thread(Thread const &);
Thread &operator = (Thread const &);
In the future, we should revisit these places and try to replace
the pointers with references. In the presence of at least one
reference member, the compiler would no longer implicitly generate
a copy constructor. So we could remove the manual declaration.
Issue #465
2017-12-21 15:42:15 +01:00
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Genode::Bit_array<256> _used { };
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2015-05-19 21:20:13 +02:00
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void _use_register(unsigned char addr, unsigned short width)
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{
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for (unsigned i = 0; i < width; i++)
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if (!_used.get(addr + i, 1))
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_used.set(addr + i, 1);
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}
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2011-12-22 16:19:25 +01:00
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public:
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2017-10-19 10:13:35 +02:00
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class Invalid_mmio_access : Genode::Exception { };
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Config_access(Attached_io_mem_dataspace &pciconf)
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:
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_pciconf(pciconf),
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_pciconf_size(Dataspace_client(_pciconf.cap()).size())
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{ }
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Config_access(Config_access &c)
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: _pciconf(c._pciconf), _pciconf_size(c._pciconf_size) { }
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2017-01-02 14:23:03 +01:00
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2011-12-22 16:19:25 +01:00
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/**
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* Read value from config space of specified device/function
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*
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* \param bus target PCI bus ID
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* \param device target device ID
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* \param function target function ID
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* \param addr target byte within targeted PCI config space
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* \param size bit width of read access
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*
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* \return value read from specified config-space address
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*
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* There is no range check for the input values.
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*/
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2015-05-19 21:20:13 +02:00
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unsigned read(int bus, int device, int function,
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unsigned char addr, Device::Access_size size,
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bool track = true)
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2011-12-22 16:19:25 +01:00
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{
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2017-10-19 10:13:35 +02:00
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unsigned ret;
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unsigned const offset = _dev_base(bus, device, function) + addr;
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char const * const field = _pciconf.local_addr<char>() + offset;
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if (offset >= _pciconf_size)
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throw Invalid_mmio_access();
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2011-12-22 16:19:25 +01:00
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2017-10-19 10:13:35 +02:00
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/*
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* Memory access code is implemented in a way to make it work
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* with Muen subject monitor (SM) device emulation and also
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* general x86 targets. On Muen, the simplified device
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* emulation code (which also works for Linux) always returns
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* 0xffff in EAX to indicate a non-existing device. Therefore,
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* we enforce the usage of EAX in the following assembly
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* templates. Also clear excess bits before return to guarantee
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* the requested size.
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*/
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2011-12-22 16:19:25 +01:00
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switch (size) {
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2015-05-19 21:20:13 +02:00
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case Device::ACCESS_8BIT:
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if (track)
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_use_register(addr, 1);
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2017-10-19 10:13:35 +02:00
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asm volatile("movb %1,%%al" :"=a" (ret) :"m" (*((volatile unsigned char *)field)) :"memory");
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return ret & 0xff;
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2015-05-19 21:20:13 +02:00
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case Device::ACCESS_16BIT:
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if (track)
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_use_register(addr, 2);
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2017-10-19 10:13:35 +02:00
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asm volatile("movw %1,%%ax" :"=a" (ret) :"m" (*(volatile unsigned short *)field) :"memory");
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return ret & 0xffff;
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2015-05-19 21:20:13 +02:00
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case Device::ACCESS_32BIT:
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if (track)
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_use_register(addr, 4);
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2017-10-19 10:13:35 +02:00
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asm volatile("movl %1,%%eax" :"=a" (ret) :"m" (*(volatile unsigned int *)field) :"memory");
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return ret;
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2015-05-19 21:20:13 +02:00
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default:
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return ~0U;
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2011-12-22 16:19:25 +01:00
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}
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}
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/**
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* Write to config space of specified device/function
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*
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* \param bus target PCI bus ID
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* \param device target device ID
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* \param function target function ID
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* \param addr target byte within targeted PCI config space
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* \param value value to be written
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* \param size bit width of write access
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*
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* There is no range check for the input values.
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*/
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2015-05-19 21:20:13 +02:00
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void write(int bus, int device, int function, unsigned char addr,
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unsigned value, Device::Access_size size,
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bool track = true)
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2011-12-22 16:19:25 +01:00
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{
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2017-10-19 10:13:35 +02:00
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unsigned const offset = _dev_base(bus, device, function) + addr;
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char const * const field = _pciconf.local_addr<char>() + offset;
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if (offset >= _pciconf_size)
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throw Invalid_mmio_access();
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2011-12-22 16:19:25 +01:00
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2017-10-19 10:13:35 +02:00
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/*
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* Write value to targeted address, see read() comment above
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* for an explanation of the assembly templates
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*/
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2011-12-22 16:19:25 +01:00
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switch (size) {
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case Device::ACCESS_8BIT:
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2015-05-19 21:20:13 +02:00
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if (track)
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_use_register(addr, 1);
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2017-10-19 10:13:35 +02:00
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asm volatile("movb %%al,%1" : :"a" (value), "m" (*(volatile unsigned char *)field) :"memory");
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2011-12-22 16:19:25 +01:00
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break;
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case Device::ACCESS_16BIT:
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2015-05-19 21:20:13 +02:00
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if (track)
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_use_register(addr, 2);
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2017-10-19 10:13:35 +02:00
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asm volatile("movw %%ax,%1" : :"a" (value), "m" (*(volatile unsigned char *)field) :"memory");
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2011-12-22 16:19:25 +01:00
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break;
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case Device::ACCESS_32BIT:
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2015-05-19 21:20:13 +02:00
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if (track)
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_use_register(addr, 4);
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2017-10-19 10:13:35 +02:00
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asm volatile("movl %%eax,%1" : :"a" (value), "m" (*(volatile unsigned char *)field) :"memory");
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2011-12-22 16:19:25 +01:00
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break;
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}
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}
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2015-05-19 21:20:13 +02:00
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bool reg_in_use(unsigned char addr, Device::Access_size size)
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{
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switch (size) {
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case Device::ACCESS_8BIT:
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return _used.get(addr, 1);
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case Device::ACCESS_16BIT:
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return _used.get(addr, 2);
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case Device::ACCESS_32BIT:
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return _used.get(addr, 4);
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default:
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return true;
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}
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}
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2011-12-22 16:19:25 +01:00
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};
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}
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2016-03-11 17:32:43 +01:00
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#endif /* _X86_PCI_CONFIG_ACCESS_H_ */
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