genode/repos/base-hw/src/core/spec/x86/kernel/thread.cc

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/*
* \brief Kernel backend for execution contexts in userland
* \author Adrian-Ken Rueegsegger
* \author Reto Buerki
* \date 2015-02-09
*/
/*
* Copyright (C) 2015 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU General Public License version 2.
*/
/* core includes */
#include <kernel/thread.h>
using namespace Kernel;
Thread::Thread(unsigned const priority, unsigned const quota,
char const * const label)
:
Thread_base(this), Cpu_job(priority, quota), _state(AWAITS_START), _pd(0),
_utcb_phys(0), _signal_receiver(0), _label(label) {}
void Thread::exception(unsigned const cpu)
{
if (trapno == PAGE_FAULT) {
_mmu_exception();
return;
hw_x86_64: Enable FPU support * Enable the use of the FXSAVE and FXRSTOR instructions, see Intel SDM Vol. 3C, section 2.5. * The state of the x87 floating point unit (FPU) is loaded and saved on demand. * Make the cr0 control register accessible in the Cpu class. This is in preparation of the upcoming FPU management. * Access to the FPU is disabled by setting the Task Switch flag in the cr0 register. * Access to the FPU is enabled by clearing the Task Switch flag in the cr0 register. * Implement FPU initialization * Add is_fpu_enabled helper function * Add pointer to CPU lazy state to CPU class * Init FPU when finishing kernel initialization * Add function to retry FPU instruction: Similar to the ARM mechanism to retry undefined instructions, implement a function for retrying an FPU instruction. If a floating-point instruction causes an #NM exception due to the FPU being disabled, it can be retried after the correct FPU state is restored, saving the current state and enabling the FPU in the process. * Disable FPU when switching to different user context: This enables lazy save/restore of the FPU since trying to execute a floating point instruction when the FPU is disabled will cause a #NM exception. * Declare constant for #NM exception * Retry FPU instruction on #NM exception * Assure alignment of FXSAVE area: The FXSAVE area is 512-byte memory region that must be 16-byte aligned. As it turns out the alignment attribute is not honored in all cases so add a workaround to assure the alignment constraint is met by manually rounding the start of the FXSAVE area to the next 16-byte boundary if necessary.
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} else if (trapno == NO_MATH_COPROC) {
if (_cpu->retry_fpu_instr(&_lazy_state)) { return; }
PWRN("fpu error");
_stop();
return;
}
if (trapno == SUPERVISOR_CALL) {
_call();
return;
} else if (trapno >= INTERRUPTS_START && trapno <= INTERRUPTS_END) {
_interrupt(cpu);
return;
} else {
PWRN("unknown exception 0x%lx", trapno);
_stop();
return;
}
}