2012-10-23 17:12:09 +02:00
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/*
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2012-12-03 17:21:35 +01:00
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* \brief CPU driver for core
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2012-10-23 17:12:09 +02:00
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* \author Martin stein
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* \date 2011-11-03
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*/
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/*
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2013-01-10 21:44:47 +01:00
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* Copyright (C) 2011-2013 Genode Labs GmbH
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2012-10-23 17:12:09 +02:00
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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2014-02-28 17:05:54 +01:00
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#ifndef _PROCESSOR_DRIVER__CORTEX_A9_H_
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#define _PROCESSOR_DRIVER__CORTEX_A9_H_
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2012-10-23 17:12:09 +02:00
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/* core includes */
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2014-02-28 17:03:45 +01:00
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#include <processor_driver/arm_v7.h>
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2012-12-10 13:55:19 +01:00
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#include <board.h>
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2012-10-23 17:12:09 +02:00
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namespace Cortex_a9
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{
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using namespace Genode;
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/**
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2012-12-03 17:21:35 +01:00
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* CPU driver for core
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2012-10-23 17:12:09 +02:00
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*/
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2014-03-03 00:12:53 +01:00
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struct Processor_driver : Arm_v7::Processor_driver
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2012-10-23 17:12:09 +02:00
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{
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enum
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{
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/* common */
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2012-12-10 13:55:19 +01:00
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CLK = Board::CORTEX_A9_CLOCK, /* CPU interface clock */
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2012-10-23 17:12:09 +02:00
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PERIPH_CLK = CLK, /* clock for CPU internal components */
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/* interrupt controller */
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2012-12-10 13:55:19 +01:00
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PL390_DISTRIBUTOR_MMIO_BASE = Board::CORTEX_A9_PRIVATE_MEM_BASE + 0x1000,
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2012-10-23 17:12:09 +02:00
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PL390_DISTRIBUTOR_MMIO_SIZE = 0x1000,
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2012-12-10 13:55:19 +01:00
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PL390_CPU_MMIO_BASE = Board::CORTEX_A9_PRIVATE_MEM_BASE + 0x100,
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2012-10-23 17:12:09 +02:00
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PL390_CPU_MMIO_SIZE = 0x100,
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/* timer */
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2012-12-10 13:55:19 +01:00
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PRIVATE_TIMER_MMIO_BASE = Board::CORTEX_A9_PRIVATE_MEM_BASE + 0x600,
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2012-10-23 17:12:09 +02:00
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PRIVATE_TIMER_MMIO_SIZE = 0x10,
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PRIVATE_TIMER_IRQ = 29,
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PRIVATE_TIMER_CLK = PERIPH_CLK
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};
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2012-12-18 11:32:48 +01:00
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/**
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* Ensure that TLB insertions get applied
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*
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* Nothing to do because MMU uses caches on pagetable walks
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*/
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static void tlb_insertions() { }
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2012-10-23 17:12:09 +02:00
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};
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}
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2014-02-28 17:05:54 +01:00
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#endif /* _PROCESSOR_DRIVER__CORTEX_A9_H_ */
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2012-10-23 17:12:09 +02:00
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