4d3d4ecca0
With this, we get rid of platform specific timer interfaces. The new Timer class does the same as the old Clock class and has a generic interface. The old Timer class was merely used by the old Clock class. Also, we get rid of having only one timer instance which we tell with each method call for which CPU it shall be done. Instead now each Cpu object has its own Timer member that knows the CPU it works for. Also, rename all "tics" to "ticks". Fixes #2347
68 lines
1.3 KiB
C++
68 lines
1.3 KiB
C++
/*
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* \brief Timer implementation specific to Cortex A9
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* \author Martin stein
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* \date 2011-12-13
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*/
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/*
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* Copyright (C) 2011-2017 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#ifndef _TIMER_DRIVER_H_
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#define _TIMER_DRIVER_H_
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/* Genode includes */
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#include <util/mmio.h>
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/* core includes */
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#include <board.h>
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namespace Kernel { class Timer_driver; }
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/**
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* Timer driver for core
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*/
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struct Kernel::Timer_driver : Genode::Mmio
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{
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enum {
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TICS_PER_MS =
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Board::CORTEX_A9_PRIVATE_TIMER_CLK /
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Board::CORTEX_A9_PRIVATE_TIMER_DIV / 1000
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};
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/**
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* Load value register
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*/
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struct Load : Register<0x0, 32> { };
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/**
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* Counter value register
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*/
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struct Counter : Register<0x4, 32> { };
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/**
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* Timer control register
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*/
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struct Control : Register<0x8, 32>
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{
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struct Timer_enable : Bitfield<0,1> { }; /* enable counting */
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struct Irq_enable : Bitfield<2,1> { }; /* unmask interrupt */
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struct Prescaler : Bitfield<8,8> { };
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};
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/**
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* Timer interrupt status register
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*/
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struct Interrupt_status : Register<0xc, 32>
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{
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struct Event : Bitfield<0,1> { }; /* if counter hit zero */
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};
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Timer_driver(unsigned);
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};
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#endif /* _TIMER_DRIVER_H_ */
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