fixup "Mini UART driver for Rpi3"
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5a2fd40e50
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6464fab582
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@ -34,9 +34,9 @@ class Genode::Bcm2835_mini_uart : Mmio
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*/
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struct AuxIrq : public Register<0x00, 32>
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{
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struct MiniUartIrq : Bitfield<0,1> { }; // read only
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struct Spi1Irq : Bitfield<1,1> { }; // read only
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struct Spi2Irq : Bitfield<2,1> { }; // read only
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struct MiniUartIrq : Bitfield<0,1> { }; /* read only */
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struct Spi1Irq : Bitfield<1,1> { }; /* read only */
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struct Spi2Irq : Bitfield<2,1> { }; /* read only */
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};
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/**
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@ -76,7 +76,7 @@ class Genode::Bcm2835_mini_uart : Mmio
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struct AuxMuIirReg : public Register<0x48, 32>
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{
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struct InterruptPending : Bitfield<0,1> { };
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struct InterruptId : Bitfield<1,2> { // read only
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struct InterruptId : Bitfield<1,2> { /* read only */
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enum {
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NO_INTERRUPTS = 0,
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TRANSMIT_HOLDING_REGISTER_EMPTY = 1,
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@ -84,7 +84,7 @@ class Genode::Bcm2835_mini_uart : Mmio
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};
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};
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struct FifoClear : Bitfield<1,2> { // write only
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struct FifoClear : Bitfield<1,2> { /* write only */
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enum {
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CLEAR_RECEIVE_FIFO = 1,
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CLEAR_TRANSMIT_FIFO = 2,
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@ -117,9 +117,9 @@ class Genode::Bcm2835_mini_uart : Mmio
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struct AuxMuLsrReg : public Register<0x54, 32>
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{
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struct DataReady : Bitfield<0,1> { };
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struct ReceiverOverrun : Bitfield<1,1> { }; // read/clear only
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struct TransmitterEmpty : Bitfield<5,1> { }; // read only
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struct TransmitterIdle : Bitfield<6,1> { }; // read only
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struct ReceiverOverrun : Bitfield<1,1> { }; /* read/clear only */
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struct TransmitterEmpty : Bitfield<5,1> { }; /* read only */
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struct TransmitterIdle : Bitfield<6,1> { }; /* read only */
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};
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/**
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@ -127,7 +127,7 @@ class Genode::Bcm2835_mini_uart : Mmio
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*/
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struct AuxMuMsrReg : public Register<0x58, 32>
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{
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struct CtsStatus : Bitfield<5,1> { }; // read only
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struct CtsStatus : Bitfield<5,1> { }; /* read only */
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};
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/**
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@ -164,18 +164,18 @@ class Genode::Bcm2835_mini_uart : Mmio
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*/
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struct AuxMuStatReg : public Register<0x64, 32>
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{
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struct SymbolAvailable : Bitfield<0,1> { }; // read only
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struct SpaceAvailable : Bitfield<1,1> { }; // read only
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struct ReceiverIsIdle : Bitfield<2,1> { }; // read only
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struct TransmitterIsIdle : Bitfield<3,1> { }; // read only
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struct ReceiverOverrun : Bitfield<4,1> { }; // read only
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struct TransmitFifoIsFull : Bitfield<5,1> { }; // read only
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struct RTSStatus : Bitfield<6,1> { }; // read only
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struct CTSLine : Bitfield<7,1> { }; // read only
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struct TransmitFifoIsEmpty : Bitfield<8,1> { }; // read only
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struct TransmitterDone : Bitfield<9,1> { }; // read only
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struct ReceiveFifoFillLevel : Bitfield<16,4> { }; // read only
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struct TransmitFifoFillLevel : Bitfield<24,4> { }; // read only
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struct SymbolAvailable : Bitfield<0, 1> { }; /* read only */
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struct SpaceAvailable : Bitfield<1, 1> { }; /* read only */
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struct ReceiverIsIdle : Bitfield<2, 1> { }; /* read only */
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struct TransmitterIsIdle : Bitfield<3, 1> { }; /* read only */
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struct ReceiverOverrun : Bitfield<4, 1> { }; /* read only */
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struct TransmitFifoIsFull : Bitfield<5, 1> { }; /* read only */
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struct RTSStatus : Bitfield<6, 1> { }; /* read only */
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struct CTSLine : Bitfield<7, 1> { }; /* read only */
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struct TransmitFifoIsEmpty : Bitfield<8, 1> { }; /* read only */
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struct TransmitterDone : Bitfield<9, 1> { }; /* read only */
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struct ReceiveFifoFillLevel : Bitfield<16,4> { }; /* read only */
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struct TransmitFifoFillLevel : Bitfield<24,4> { }; /* read only */
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};
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/**
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@ -189,7 +189,11 @@ class Genode::Bcm2835_mini_uart : Mmio
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/**
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* Idle until the device is ready for action
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*/
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void _wait_until_ready() { do {asm volatile("nop");} while (!read<AuxMuLsrReg::TransmitterEmpty>()) ; }
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void _wait_until_ready() {
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do {
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asm volatile("nop");
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} while (!read<AuxMuLsrReg::TransmitterEmpty>()) ;
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}
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public:
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@ -209,8 +213,10 @@ class Genode::Bcm2835_mini_uart : Mmio
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};
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Genode::Bcm2835_mini_uart::Bcm2835_mini_uart(addr_t const base, uint32_t const clock,
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uint32_t const baud_rate) : Mmio(base)
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Genode::Bcm2835_mini_uart::Bcm2835_mini_uart(addr_t const base,
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uint32_t const clock,
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uint32_t const baud_rate)
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: Mmio(base)
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{
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/* enable UART1, AUX mini uart */
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write<AuxEnables>(read<AuxEnables::MiniUartEnable>() |
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@ -218,18 +224,12 @@ Genode::Bcm2835_mini_uart::Bcm2835_mini_uart(addr_t const base, uint32_t const c
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write<AuxMuCntlReg>(0);
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write<AuxMuLcrReg>(3);
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//write<AuxMuLcrReg>(AuxMuLcrReg::DataSize::bits(1));
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write<AuxMuMcrReg>(0);
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/* write<AuxMuMcrReg>(AuxMuMcrReg::RTS::bits(0)); */
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write<AuxMuIerReg>(0);
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/* write<AuxMuIerReg>(AuxMuIerReg::EnableTransmitInterrupt::bits(0) | */
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/* AuxMuIerReg::EnableReceiveInterrupt::bits(0)); */
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write<AuxMuIirReg>(0xc6);
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uint32_t const adjusted_br = ((clock / baud_rate) / 8) - 1;
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write<AuxMuBaudReg>(AuxMuBaudReg::Baudrate::bits(adjusted_br)); // 115200 baud
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uint32_t const adjusted_br = ((clock / baud_rate) / 8) - 1;
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write<AuxMuBaudReg>(AuxMuBaudReg::Baudrate::bits(adjusted_br));
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write<AuxMuCntlReg>(3);
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_wait_until_ready();
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}
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